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CS5308GDWR28 bảng dữ liệu(PDF) 23 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  Two?뭁hase PWM Controller with Integrated Gate Drivers for VRM 8.5
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the RCSn • CCSn network to provide a “square−wave” at the
VDRP output pin with maximum rise time and minimal
overshoot as shown in Figure 21.
Figure 19. VDRP Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Too Long
(Slow): VDRP and VOUT Respond Too Slowly.
Figure 20. VDRP Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Too Short
(Fast): VDRP and VOUT Both Overshoot.
Figure 21. VDRP Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Optimal:
VDRP and VOUT Respond to the Load Current Quickly
Without Overshooting.
8. Error Amplifier Tuning
After the steady−state (static) AVP has been set and the
current sense network has been optimized the Error
Amplifier must be tuned. Basically, the gain of the Error
Amplifier should be adjusted to provide an acceptable
transient response by increasing or decreasing the Error
Amplifier’s feedback capacitor (CAMP in the Applications
Diagram). The bandwidth of the control loop will vary
directly with the gain of the error amplifier.
Figure 22. The Value of CAMP Is Too High and the
Loop Gain/Bandwidth Too Low. COMP Slews Too
Slowly Which Results in Overshoot in VOUT.
If CAMP is too large the loop gain/bandwidth will be low,
the COMP pin will slew too slowly, and the output voltage
will overshoot as shown in Figure 22. On the other hand, if



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