CS5308GDWR28 datasheet(8/31 Pages) ONSEMI

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CS5308

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PACKAGE PIN DESCRIPTION

PACKAGE PIN #

PIN SYMBOL

FUNCTION

28 Lead SO Wide

COMP

Output of the error amplifier and input for the PWM compara-

tors.

VFB

Voltage Feedback Pin. To use Adaptive Voltage Positioning,

set the light load offset voltage by connecting a resistor be-

tween VFB and VOUT. The resistor and the VFB bias current

determine the offset. For no adaptive positioning connect

VFB directly to VOUT.

VDRP

Current sense output for Adaptive Voltage Positioning (AVP).

The offset of this pin above the DAC voltage is proportional

to the output current. Connect a resistor from this pin to VFB

to set the amount of AVP or leave this pin open for no AVP.

This pin’s maximum working voltage is 2.3 Vdc.

REF

Reference output. Decouple to LGND with 0.1 mF.

ILIM

Sets threshold for current limit. Connect to reference through

a resistive divider. This pin’s maximum working voltage is

1.3 Vdc.

6−10

VID Pins

Voltage ID DAC inputs. These pins are internally pulled up to

3.3 V if left open.

PWRGD

Power Good Output. Open collector output goes low when

CSREF is out of regulation.

CSREF

Reference for current sense amplifiers, input to the Power

Good comparators, and fast feedback connection to the

PWM comparator. Connect this pin to the output voltage

through a resistor equal to 1/5th the value of the current

sense resistors. The input voltage to this pin must not ex-

ceed the maximum VID (DAC) setting by more than 100 mV.

13, 14

CS1−CS2

Current Sense inputs. Connect Current Sense network for

the corresponding phase to each input. The input voltages to

these pins must be kept within 105 mV of CSREF or pulse−

by−pulse current limit will be triggered.

VTT

VTT sense input. The voltage on this pin must be higher

than the VTT threshold (nominally 1.05 V) or switching will

not occur.

VTTCT

1.0 ms timer for VTT Power Good.

VTTPGD

VTT Power Good output. Open collector, pulls down when

VTT < 1.03 V.

VCCH2

Power for channel 2 high side gate driver.

19, 20

GATE(H)2, GATE(L)2

High and low side gate drivers for channels 1 and 2.

VCCL12

Power for both low side gate drivers.

PGND

Return for all gate drivers.

23, 24

GATE(L)1, GATE(H)1

Low and high side gate drivers for channels 1 and 2.

VCCH1

Power for channel 1 high side gate driver.

VCCL

Power for logic. UVLO Sense for supply connects to this pin.

LGND

Ground for internal control circuits and the IC substrate con-

nection.

ROSC

A resistor from this pin to ground sets operating frequency.

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