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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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AD9640/PCB bảng dữ liệu(PDF) 5 Page - Analog Devices |
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AD9640/PCB bảng dữ liệu(HTML) 5 Page - Analog Devices |
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5 / 41 page  Preliminary Technical Data AD9640 Rev. PrD | Page 5 of 41 SPECIFICATIONS ADC DC SPECIFICATIONS AVDD = 1.8 V, DVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS enabled, Fast Detect Outputs disabled, Signal Monitor disabled, unless otherwise noted. Table 1. AD9640BCPZ-80 AD9640BCPZ-105 AD9640BCPZ-125 AD9640BCPZ-150 Unit Parameter Temp Min Typ Max Min Typ Max Min Typ Max Min Typ Max RESOLUTION Full 14 14 14 14 Bits ACCURACY No Missing Codes Full Guaranteed Guaranteed Guaranteed Guaranteed Offset Error Full ±0.3 ±TBD ±0.3 ±TBD ±0.3 ±TBD ±0.3 ±TBD % FSR Gain Error Full ±2.0 ±2.0 ±1.7 ±1.7 % FSR Differential Nonlinearity (DNL)1 Full ±TBD ±TBD ±TBD ±TBD LSB 25°C ±0.4 ±0.4 ±0.4 ±0.4 LSB Integral Nonlinearity (INL) Full ±TBD ±TBD ±TBD ±TBD LSB 25°C ±2 ±1.8 ±2 ±2 LSB TEMPERATURE DRIFT Offset Error Full ±15 ±15 ±15 ±15 ppm/°C Gain Error Full ±95 ±95 ±95 ±95 ppm/°C INTERNAL VOLTAGE REFERENCE Output Voltage Error (1 V Mode) Full TBD TBD TBD TBD mV Load Regulation @ 1.0 mA Full TBD TBD TBD TBD mV INPUT REFERRED NOISE VREF = 1.0 V 25°C TBD TBD TBD TBD LSB rms ANALOG INPUT Input Span, VREF = 1.0 V Full 2 2 2 2 V p-p Input Capacitance2 Full 8 8 8 8 pF VREF INPUT RESISTANCE Full 6 6 6 6 kΩ POWER SUPPLIES Supply Voltage AVDD, DVDD Full 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V DRVDD (CMOS Mode) Full 1.7 3.3 3.6 1.7 3.3 3.6 1.7 3.3 3.6 1.7 3.3 3.6 V Supply Current IAVDD Full 219 292 363 384 mA IDVDD Full 29 37 45 47.5 mA IDRVDD (3.3V) Full 30 39 47 53.3 mA IDRVDD (1.8V) Full TBD TBD TBD TBD mA PSRR Full ±0.01 ±0.01 ±0.01 ±0.01 % FSR POWER CONSUMPTION DC Input Full TBD TBD TBD TBD mW Sine Wave Input (DRVDD=1.8V) Full TBD TBD TBD TBD mW Sine Wave Input (DRVDD=3.3V) Full 546 721 890 953 mW Standby Power3 Full TBD TBD TBD TBD mW Powerdown Power Full TBD TBD TBD TBD mW 1 Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit. 2 Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure x for the equivalent analog input structure. 3 Standby power is measured with a dc input, the CLK pins inactive (set to AVDD or AGND). |
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