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AD9992BBCZ bảng dữ liệu(PDF) 79 Page - Analog Devices

tên linh kiện AD9992BBCZ
Giải thích chi tiết về linh kiện  12-Bit CCD Signal Processor with Precision Timing Generator
PDF  92 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD9992BBCZ bảng dữ liệu(HTML) 79 Page - Analog Devices

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AD9992
Rev. C | Page 79 of 92
Address
Data Bits
Default
Value
Update
Type
Mnemonic
Description
[6:4]
1
H2DRV
H2 drive strength (same range as H1DRV).
[10:8]
1
H3DRV
H3 drive strength (same range as H1DRV).
[14:12]
1
H4DRV
H4 drive strength (same range as H1DRV).
[18:16]
1
HLDRV
HL drive strength (same range as H1DRV).
[22:20]
1
RGDRV
RG drive strength (same range as H1DRV).
0x36
[2:0]
1
SCK
H5DRV
H5 drive strength (same range as H1DRV).
[6:4]
1
H6DRV
H6 drive strength (same range as H1DRV).
[10:8]
1
H7DRV
H7 drive strength (same range as H1DRV).
[14:12]
1
H8DRV
H8 drive strength (same range as H1DRV).
0x37
[5:0]
0
SCK
SHDLOC
SHD sampling edge location.
[11:6]
20
SHPLOC
SHP sampling edge location.
[17:12]
10
SHPWIDTH
SHP width (controls input dc restore switch active time).
0x38
[5:0]
0
SCK
DOUTPHASEP
DOUT phase control, positive edge. Specifies location of
DOUT.
[11:6]
20
DOUTPHASEN
DOUT phase control, negative edge. Always set to
DOUTPHASEP plus 32 edges to maintain 50% duty cycle of
internal DOUTPHASE clocking.
[12]
0
DCLKMODE
DCLK mode. 0: DCLK tracks DOUT; 1: DCLK phase is fixed.
[14:13]
0
DOUTDELAY
Data output delay (tOD) with respect to DCLK rising edge:
0: No delay.
1: ~3 ns.
2: ~6 ns.
3: ~9 ns.
[15]
0
DCLKINV
Invert DCLK output:
0: No inversion.
1: Inversion of DCLK.
0x39
[2:0]
7
SCK
CPHMASK
Enable H-masking during CP operation.
Table 35. Test Registers—Do Not Access
Address
Data Bits
Default
Value
Update
Type
Mnemonic
Description
0x3E to 0x4F
Test registers only. Do not access.
Table 36. Test Registers—Do Not Access
Address
Data Bits
Default
Value
Update
Type
Mnemonic
Description
0x50 to 0x6F
Test registers only. Do not access.
Table 37. Shutter and GPO Registers
Address
Data Bits
Default
Value
Update
Type
Mnemonic
Description
0x70
[2:0]
0
VD
PRIMARY_ACTION
Selects action for primary and secondary counters.
[5:3]
0
SECOND_ACTION
0: Idle (do nothing) autoreset on VD.
1: Activate counter (primary: auto exposure/readout).
2: RapidShot, wrap/repeat counter.
3: ShotTimer, delay start of count.
4: ShotTimer with RapidShot.
5: SLR exposure (manual).
6: SLR read (manual).
7: Force to idle.



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