G -LINK

GLT6400L08

Ultra Low Power 512k x 8 CMOS SRAM

Feb 2001(Rev. 1.1)

G-Link Technology Corporation

2701 Northwestern Parkway

Santa Clara, CA 95051, U.S.A.

G-Link Technology Corporation, Taiwan

6F No. 24-2, Industry E. RD. IV, Science Based

Industrial Park, Hsin Chu, Taiwan.

- 8 -

Notes :

1.

L-version includes this feature.

2.

This Parameter is samples and not 100% tested.

3.

For test conditions, see AC Test Condition.

4.

This parameter is tested with CL = 5pF. Transition is measured

± 500mV from steady – state voltage.

5.

This parameter is guaranteed, but is not tested.

6.

WE

is HIGH for read cycle.

7.

CE1

and OE

are LOW and for read cycle.

8.

Address valid prior to or coincident with CE1

transition LOW .

9.

All read cycle timings are referenced from the last valid address to the first transition address.

10.

CE1

or WE must be HIGH during address transition.

11. All write cycle timings are referenced from the last valid address to the first transition address.