TMPR4955AF datasheet(109/168 Pages) TOSHIBA

109 / 168 page

Chapter 6 TX4955A System Interface

6-37

TX4955A

SysCmd (4:0)

SysAD (31:0)

External Agent

Figure 6.3.1 System Interface Buses

6.3.3.9

Address and Data Cycles

The SysCmd

SysCmd

SysCmd bus identifies the contents of the SysAD

SysAD

SysAD bus during any cycle in which

it is valid. Cycles in which the SysAD

SysAD

SysAD bus contains a valid address are called

address

cycles. Cycles in which the SysAD

SysAD

SysAD bus contains valid data are called

data cycles. The

most significant bit of the SysCmd

SysCmd

SysCmd bus is always used to indicate whether the current

cycle is an address cycle or a data cycle.

When the TX4955A processor is driving the SysAD

SysAD

SysAD and SysCmd

SysCmd

SysCmd buses, the System

interface is in

master state. When the external agent is driving the SysAD

SysAD

SysAD and

SysCmd

SysCmd buses, the System interface is in

slave state.

•

When the processor is master, it asserts the PValid

PValid

PValid* signal when the SysAD

SysAD

and SysCmd

SysCmd

SysCmd buses are valid.

•

When the processor is slave, an external agent asserts the EValid

EValid

EValid* signal

when the SysAD

SysAD

SysAD and SysCmd

SysCmd

SysCmd buses are valid.

The SysCmd

SysCmd

SysCmd bus identifies the contents of the SysAD

SysAD

SysAD bus during valid cycles.

•

During address cycles [SysCmd (4)

SysCmd (4)

SysCmd (4) = 0], the remainder of the SysCmd

SysCmd

SysCmd bus,

SysCmd (3:0)

SysCmd (3:0), contains a

System interface command, described later in this

chapter.

•

During data cycles [SysCmd (4)

SysCmd (4)

SysCmd (4) = 1], the remainder of the SysCmd

SysCmd

SysCmd bus,

SysCmd (3:0)

SysCmd (3:0), contains a

data identifier, described later in this chapter.

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