LMX2330UTM datasheet(3/42 Pages) NSC

3 / 42 page

Connection Diagrams

Chip Scale Package (SLB)

(Top View)

Thin Shrink Small Outline Package (TM)

(Top View)

10136639

10136602

Pin Descriptions

Name

Pin No.

24-Pin CSP

Pin No.

20-Pin TSSOP

I/O

Description

—

Power supply bias for the RF PLL analog and digital circuits. V

CC may

range from 2.7V to 5.5V. Bypass capacitors should be placed as close as

possible to this pin and be connected directly to the ground plane.

P RF

—

RF PLL charge pump power supply. Must be

≥ V

CC.

o RF

RF PLL charge pump output. The output is connected to the external loop

filter, which drives the input of the VCO.

GND

—

Ground for the RF PLL digital circuitry.

IN RF

RF PLL prescaler input. Small signal input from the VCO.

IN RF

RF PLL prescaler complementary input. For single ended operation, this

pin should be AC grounded. The LMX233xU RF PLL can be driven

differentially when the bypass capacitor is omitted.

GND

—

Ground for the RF PLL analog circuitry.

OSC

Reference oscillator input. The input has an approximate V

CC/2 threshold

and can be driven from an external CMOS or TTL logic gate.

GND

—

Ground for the IF PLL digital circuits, MICROWIRE™,F

oLD, and oscillator

circuits.

oLD

Programmable multiplexed output pin. Functions as a general purpose

CMOS TRI-STATE output, RF/IF PLL push-pull analog lock detect output,

N and R divider output or Fastlock output, which connects a parallel

resistor to the external loop filter.

Clock

MICROWIRE Clock input. High impedance CMOS input. Data is clocked

into the 22-bit shift register on the rising edge of Clock.

Data

MICROWIRE Data input. High impedance CMOS input. Binary serial data.

The MSB of Data is shifted in first. The last two bits are the control bits.

MICROWIRE Latch Enable input. High impedance CMOS input. When LE

transitions HIGH, Data stored in the shift register is loaded into one of 4

internal control registers.

GND

—

Ground for the IF PLL analog circuitry.

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