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ICS9LRS4103 bảng dữ liệu(PDF) 2 Page - Renesas Technology Corp |
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ICS9LRS4103 bảng dữ liệu(HTML) 2 Page - Renesas Technology Corp |
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2 / 15 page ![]() IDT® PC MAIN CLOCK 1520D—01/06/11 ICS9LRS4103 PC MAIN CLOCK 2 Pin Description Pin# Pin Name Type Pin Description 1 X1 IN Crystal input, Nominally 14.318MHzMHz. 2 X2 OUT Crystal output, Nominally 14.318MHzMHz. 3 SMBCLK_3.3 IN Clock pin of SMBus circuitry, 3.3V tolerant. 4 SMBDAT_3.3 I/O Data pin for SMBus circuitry, 3.3V tolerant. 5 VDD96 PWR Power pin for the DOT96MHz output 3.3V. 6DOT96T OUT True clock DOT96 output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 7DOT96C OUT Complementary clock DOT96 output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 8 GND96 PWR Ground pin for the DOT96MHz output. 9 GNDSSC PWR Ground pin for the CK_SSC_DISP output. 10 CK_SSC_DISP_T OUT True clock of CK_SSC_DISP (100MHz or 120MHz) output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 11 CK_SSC_DISP_C OUT Complementary clock of CK_SSC_DISP (100MHz or 120MHz) output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 12 VDDSSC PWR Power pin for the CK_SSC_DISP output 3.3V 13 VDDSATA PWR Power pin for the SATA output 3.3V 14 SRC1T/SATA_NS_T OUT True clock of differential 0.8V push-pull SRC/SATA output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 15 SRC1C/SATA_NS_C OUT Complementary clock of differential 0.8V push-pull SRC/SATA output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 16 GNDSATA PWR Ground pin for the SATA output. 17 GNDSRC PWR Ground pin for the SRC output. 18 SRC2T OUT True clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 19 SRC2C OUT Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 20 VDDSRC PWR Power pin for the SRC output 3.3V. 21 SEL_120M# IN Selects pins #10/11 to be 120MHz or 100MHz. "0" = 120MHz, "1" = 100MHz. 22 GNDCPU PWR Ground pin for the CPU output. 23 CPUT0 OUT True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 24 CPUC0 OUT Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 25 VDDCPU PWR Power pin for the CPU output 3.3V 26 CKPWRGD/PD#_3.3 IN Notifies CK505 to sample latched inputs, or iAMT entry/exit, or PWRDWN# mode 27 VDDREF14M PWR Power pin for the REF output 3.3V 28 REF14.318M_2X/FSLC** I/O Reference 14.318 MHz clock, which drives 3 loads on default / 3.3V tolerant input for CPU frequency selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values. 29 GNDREF PWR Ground pin for the REF output. 30 VDDXTAL PWR Power pin for XTAL 3.3V 31 SEL_SATA_NS# IN Selects pin #14/15 to be SRC1 or SATA_NS. "0" = SATA_NS, "1" = SRC1 32 GNDXTAL PWR Ground pin for XTAL. |
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