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ICS9LRS4103 bảng dữ liệu(PDF) 13 Page - Renesas Technology Corp |
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ICS9LRS4103 bảng dữ liệu(HTML) 13 Page - Renesas Technology Corp |
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13 / 15 page ![]() IDT® PC MAIN CLOCK 1520D—01/06/11 ICS9LRS4103 PC MAIN CLOCK 13 Byte 9 Amplitude Control Register Bit Pin Name Description Type 0 1 Default 7 Reserved Reserved RW - - 0 6 Reserved Reserved R -- 0 5 REF Strength Sets the REF output drive strength RW 1 Load 2 Loads 1 4 Reserved Reserved RW - - 0 3 Reserved Reserved RW - - 0 2 IO_VOUT2 IO Output Voltage Select (Most Significant Bit) RW 1 1 IO_VOUT1 IO Output Voltage Select RW 0 0 IO_VOUT0 IO Output Voltage Select (Least Significant Bit) RW 1 Byte 10 Reserved Register Bit Pin Name Description Type 0 1 Default 7 Reserved Reserved RW - - 0 6 Reserved Reserved RW - - 0 5 Reserved Reserved RW - - 0 4 Reserved Reserved RW - - 0 3 Reserved Reserved RW - - 0 2 Reserved Reserved RW - - 0 1 Reserved Reserved RW - - 1 0 Reserved Reserved RW - - 1 Byte 11 iAMT Enable Register Bit Pin Name Description Type 0 1 Default 7 Reserved Reserved RW 0 6 Reserved Reserved RW 0 5 Reserved Reserved RW 0 4 Reserved Reserved RW 1 3 Reserved Reserved RW - - 0 2 CPU0_AMT_EN M1 mode clk enable RW Disable Enable 1 1 PCI-E_GEN2 Determines if PCI-E Gen2 compliant R non-Gen2 PCI-E Gen2 Compliant 1 0 Reserved Reserved RW - - 1 Byte 12 Byte Count Register Bit Pin Name Description Type 0 1 Default 7 Reserved RW 0 6 Reserved RW 0 5 BC5 RW 0 4 BC4 RW 0 3 BC3 RW 1 2 BC2 RW 1 1 BC1 RW 0 0 BC0 RW 1 Read Back byte count register, max bytes = 32 See Table 2: V_IO Selection (Default is 0.8V) |
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