8S73034AMILF datasheet(13/21 Pages) RENESAS

tên linh kiện	8S73034AMILF

Giải thích chi tiết về linh kiện	Low Skew, ÷2, ÷4, ÷8 Differential-to-LVPECL Clock Divider

PDF	21 Pages

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ICS8S73034I Data Sheet

LOW SKEW , ÷2, ÷4, ÷8 DIFFERENTIAL-TO-LVPECL CLOCK DIVIDER

ICS8S73034AMI REVISION A JUNE 8, 2011

Application Schematic Example

Figure 6 shows an example of ICS8S73034I application schematic.

In this example, the device is operated at V

CC= 3.3V. The decoupling

capacitor should be located as close as possible to the power pin.

The input is driven by a 3.3V LVPECL driver. For the LVPECL output

drivers, only two terminations examples are shown in this schematic.

More termination approaches are shown in the LVPECL Termination

Application Note.

Figure 6. ICS8S73034I Application Schematic Example

Zo = 50 Ohm

(U1-3)

82.5

3.3V

Zo = 50 Ohm

R10

LVPECL

0.1uF

Zo = 50 Ohm

Optional

Y-Termination

ICS873034

nQ0

VCC

nQ1

VCC

nQ2

VEE

VBB

nCLK

CLK

nEN

VCC

133

0.1uF

3.3V

82.5

(U1-16)

Zo = 50 Ohm

133

0.1uF

Zo = 50 Ohm

3.3V

(U1-6)

3.3V

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