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ADF7021 bảng dữ liệu(PDF) 24 Page - Analog Devices

tên linh kiện ADF7021
Giải thích chi tiết về linh kiện  High Performance Narrowband ISM Transceiver IC
PDF  44 Pages
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ADF7021 bảng dữ liệu(HTML) 24 Page - Analog Devices

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ADF7021
Preliminary Technical Data
Rev. PrI | Page 24 of 44
As with the external Rx/Tx switch, an additional LPF or BPF
could be required to suppress harmonics in the transmit
spectrum or to improve the resilience of the receiver against
out-of-band interferers.
TRANSMIT PROTOCOL AND CODING
CONSIDERATIONS
PREAMBLE
SYNC
WORD
ID
FIELD
DATA FIELD
CRC
Figure 25. Typical Format of a Transmit Protocol
A dc-free preamble pattern is recommended for FSK demodula-
tion. The recommended preamble pattern is a dc-free pattern
such as a 10101010 … pattern. Preamble patterns with longer
run-length constraints such as 11001100… can also be used.
However, this results in a longer synchronization time of the
received bit stream in the receiver.
Manchester coding can be used for the entire transmit protocol.
However, the remaining fields that follow the preamble header
do not have to use dc-free coding. For these fields, the ADF7021
can accommodate coding schemes with a run length of up to
6 bits without any performance degradation.
If longer run-length coding must be supported, the ADF7021
has several other features that can be activated. These involve a
range of programmable options that allow the envelope detector
output to be frozen after preamble acquisition.
DEVICE PROGRAMMING AFTER INITIAL POWER-UP
Table 13 lists the minimum number of writes needed to set up
the ADF7021 in either Tx or Rx mode after CE is brought high.
Additional registers can also be written to tailor the part to a
particular application, such as setting up sync byte detection or
enabling AFC. When going from Tx to Rx or vice versa, the
user needs to write only to Register 1 to alter the LO by 100 kHz
and to toggle the Tx/Rx bit.
Table 13. Minimum Register Writes Required for Tx/Rx Setup
Mode
Registers
Tx
Reg 0
Reg 1
Reg 2
Reg 3
Rx
Reg 0
Reg 1
Reg 3
Reg 4
Reg 5
Tx <-> Rx
Reg 0
Figure 26 and Figure 27 show the recommended programming
sequence and associated timing for power-up from standby mode.
2.0mA
3.65mA
12mA
TIME
REG.
READY
t1
WR1
t3
VCO
t4
WR3
t5
WR6
t6
WR5
t7
19mA TO
22mA
tOFF
tON
XTAL
t0
WR0
t9
WR4
t10
AGC/
RSSI
t11
CDR
t12
AFC
t13
RxDATA
t14
t2
t8
Figure 26. Rx Programming Sequence and Timing Diagram



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