MPC93R52 REVISION 6 3/14/16

10

©2016 Integrated Device Technology, Inc.

MPC93R52 DATA SHEET

Figure 11. Single versus Dual Waveforms

Since this step is well above the threshold region it will not

cause any false clock triggering, however designers may be

uncomfortable with unwanted reflections on the line. To better

match the impedances when driving multiple lines the

situation in Figure 12 should be used. In this case the series

terminating resistors are reduced such that when the parallel

combination is added to the output buffer impedance the line

impedance is perfectly matched.

Figure 12. Optimized Dual Line Termination

Figure 13. CCLK MPC93R52 AC Test Reference for VCC = 3.3 V and VCC = 2.5 V

Time (ns)

3.0

2.5

2.0

1.5

1.0

0.5

0

2

4

6

8

10

12

14

OutB

tD = 3.9386

OutA

tD = 3.8956

In

14



MPC93R52

Output

Buffer

RS = 22

ZO = 50

RS = 22

ZO = 50

14

+ 22  || 22  = 50  || 50 

25

 = 25 

Pulse

Generator

Z = 50



RT = 50

ZO = 50

RT = 50 

ZO = 50 

MPC93R52 DUT

VTT

VTT