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MPC93R52 bảng dữ liệu(PDF) 7 Page - Renesas Technology Corp |
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MPC93R52 bảng dữ liệu(HTML) 7 Page - Renesas Technology Corp |
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7 / 14 page  REVISION 6 3/14/16 7 ©2016 INTEGRATED DEVICE TECHNOLOGY, INC. MPC93R52 DATA SHEET Example Configurations for the MPC93R52 MPC93R52 configuration to multiply the reference frequency by 3, 3 2 and 1. PLL feedback of QA4 = 33.3 MHz. Figure 3. MPC93R52 Default Configuration Figure 4. MPC93R52 Zero Delay Buffer Configuration Figure 5. MPC93R52 Default Configuration Figure 6. MPC93R52 Zero Delay Buffer Configuration 2 MPC93R52 fref = 100 MHz 100 MHz 100 MHz 100 MHz (Feedback) QA0 QA1 QA2 QA3 QA4 QB0 QB1 QB2 QB3 QC0 QC1 CCLK FB_IN FSELA FSELB FSELC F_RANGE 200 MHz MPC93R52 default configuration (feedback of QB0 = 100 MHz). All control pins are left open. MPC93R52 fref = 62.5 MHz 62.5 MHz 62.5 MHz 62.5 MHz (Feedback) QA0 QA1 QA2 QA3 QA4 QB0 QB1 QB2 QB3 QC0 QC1 CCLK FB_IN FSELA FSELB FSELC F_RANGE 62.5 MHz MPC93R52 zero-delay (feedback of QB0 = 62.5 MHz). All control pins are left open except FSELC = 1. All outputs are locked in frequency and phase to the input clock. MPC93R52 fref = 33.3 MHz 33.3 MHz 50 MHz 33.3 MHz (Feedback) QA0 QA1 QA2 QA3 QA4 QB0 QB1 QB2 QB3 QC0 QC1 CCLK FB_IN FSELA FSELB FSELC F_RANGE 100 MHz MPC93R52 fref = 33.3 MHz 33.3 MHz 33.3 MHz 33.3 MHz (Feedback) QA0 QA1 QA2 QA3 QQ4 QB0 QB1 QB2 QB3 QC0 QC1 CCLK FB_IN FSELA FSELB FSELC F_RANGE 33.3 MHz MPC93R52 zero-delay (feedback of QB0 = 33.3 MHz). Equivalent to Figure 2 except F_RANGE = 1 enabling a lower input and output clock frequency. Frequency range Min Max Input 50 MHz 120 MHz QA outputs 50 MHz 12 MHz QB outputs 50 MHz 120 MHz QC outputs 100 MHz 240 MHz Frequency range Min Max Input 50 MHz 120 MHz QA outputs 50 MHz 120 MHz QB outputs 50 MHz 120 MHz QC outputs 50 MHz 120 MHz Frequency range Min Max Input 25 MHz 60 MHz QA outputs 50 MHz 120 MHz QB outputs 50 MHz 120 MHz QC outputs 100 MHz 240 MHz Frequency range Min Max Input 25 MHz 60 MHz QA outputs 25 MHz 60 MHz QB outputs 25 MHz 60 MHz QC outputs 25 MHz 60 MHz VCC VCC VCC VCC VCC VCC |
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