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M66596 bảng dữ liệu(PDF) 49 Page - Renesas Technology Corp

tên linh kiện M66596
Giải thích chi tiết về linh kiện  ASSP (USB2.0 Dual Function Controller)
PDF  133 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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M66596 bảng dữ liệu(HTML) 49 Page - Renesas Technology Corp

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M66596FP/WG
rev .1.00
2006.3.14
page 47 of 127
Pipe timing control register [PIPEPERI]
<Address: 6CH>
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IFIS
IITV
?
?
?
?
?
?
?
?
?
?
?
?
0
0
-
0
?
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0
0
-
0
0
0
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0
0
0
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0
Bit
Name
Function
S/W
H/W
Note
15-13 Nothing is placed here. These should be fixed at “0”.
12
IFIS
Isochronous IN buffer flush
0: The buffer is not flushed.
1: The buffer is flushed.
R/W
R
3.9.5
11-3 Nothing is placed here. These should be fixed at “0”.
2-0 IITV
Interval error detection spacing
Specifies the interval timing as
IITV-th power
of
2.
R/W
R
3.9.3
*11)
<<Note>>
*11) In the peripheral mode the IITV bit is valid only when isochronous transfer is selected. It can be set only when
PIPE1-2 are selected.
For OUT-direction: An interval error occurs upon a NRDY interrupt caused by a token not having been issued.
For IN-direction: When the controller doesn't receive IN-token until the time indicated by IITV bit, it detects an
interval error and flushs the buffer.
In the host mode the IITV bit is valid only when isochronous and interrupt transfer is selected. The IITV bit
controls the interval of a transaction.



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