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HTMS1301FUG/AM bảng dữ liệu(PDF) 11 Page - NXP Semiconductors |
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HTMS1301FUG/AM bảng dữ liệu(HTML) 11 Page - NXP Semiconductors |
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11 / 44 page ![]() 184430 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet PUBLIC Rev. 3.0 — 18 March 2010 184430 11 of 44 NXP Semiconductors HITAG µ ISO 18000 transponder IC 10.1.3 RWD - Start of frame pattern A RWD request always starts with a SOF pattern for ease of synchronization. The SOF pattern consists of an encoded data bit ’0’ and a ’code violation’. The HITAG µ ISO 18000 transponder IC shall be ready to receive a SOF from the RWD within 1.2 ms after having sent a response to the RWD. The HITAG µ ISO 18000 transponder IC shall be ready to receive a SOF from the RWD within 2.5 ms after the RWD has established the powering field. 10.1.4 RWD - End of frame pattern For slot switching during a multi-slot anticollision sequence, the RWD request is an EOF pattern. The EOF pattern is represented by a RWD ’Stop condition’. Fig 5. Start of frame pattern 001aaj828 carrier on TFd0 TFpSOF TF1 carrier off TF1 TF1 TFcv data "0" "code violation" Fig 6. End of frame pattern 001aaj829 carrier on TFpEOF TF1 carrier off TFsc "stop condition'' |
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