DA7211 datasheet(4/111 Pages) RENESAS

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DA7211

Ultra-low power stereo codec

Datasheet

Revision 3.2

23-Dec-2021

CFR0011-120-00 Rev 5

4 of 110

Figure 11: DAC DC blocking (cut-off frequency setting ‘00’ to ‘11’, 48 kHz)....................................... 33

Figure 12: DAC pass band attenuation (audio mode, 48 kHz)............................................................ 34

Figure 13: DAC pass band suppression (audio mode, 48 kHz) .......................................................... 34

Figure 14: DA7211 audio signal paths ................................................................................................ 35

Figure 15: Digital signal processing engine (simplified block diagram) .............................................. 38

Figure 16: Direct form I implementation of a second order IIR filter ................................................... 38

Figure 17: Band 5 (LP 50 Hz) frequency response at FS = 48 kHz.................................................... 41

Figure 18: Band 5 (BP 150 Hz) frequency response at FS = 48 kHz ................................................. 41

Figure 19: Band 5 (BP 500 Hz) frequency response at FS = 48 kHz ................................................. 41

Figure 20: Band 5 (BP 2500 Hz) frequency response at FS = 48 kHz ............................................... 42

Figure 21: Band 5 (HP 5000 Hz) frequency response at FS = 48 kHz ............................................... 42

Figure 22: Record only ........................................................................................................................ 43

Figure 23: Record with sound monitor ................................................................................................ 43

Figure 24: Stereo playback (for example, freefield headphone equalisation)..................................... 44

Figure 25: Sound spatialiser for stereo speaker ................................................................................. 44

Figure 26: Voice mode recording high pass filter (cut-off frequency setting ‘000’ to ‘111’, 8 kHz) .... 45

Figure 27: Voice mode recording frequency response (setting ‘001’, 8 kHz) ..................................... 46

Figure 28: Voice mode recording stop band suppression (8 kHz) ...................................................... 46

Figure 29: Voice mode playback high-pass filter (cut-off frequency setting ‘000’ to ‘111’, 16 kHz)... 47

Figure 30: Voice mode playback frequency response (setting ‘001’, 8 kHz) ...................................... 47

Figure 31: Voice mode playback stop band suppression (8 kHz) ....................................................... 48

Figure 32: Transmit (red), receive (green) and sidetone (blue) sound filtering for phone applications

............................................................................................................................................................. 48

Figure 33: Right justified format .......................................................................................................... 49

Figure 34: Left justified format ............................................................................................................. 50

Figure 35: I2S format........................................................................................................................... 50

Figure 36: DSP format......................................................................................................................... 50

Figure 37: TDM left justified format ..................................................................................................... 51

Figure 38: TDM DSP format ................................................................................................................ 51

Figure 39: PLL master mode start up sequence ................................................................................. 56

Figure 40: Non-PLL mode start-up sequence ..................................................................................... 59

Figure 41: PLL Slave mode start-up sequence ................................................................................... 61

Figure 42: PLL block diagram ............................................................................................................. 62

Figure 43: Schematic of a 2-wire control bus ...................................................................................... 62

Figure 44: 2-wire byte write (SI/DATA line) ......................................................................................... 63

Figure 45: Examples of 2-wire byte read (SI/DATA line) .................................................................... 63

Figure 46: Examples of 2-wire page read (SI/DATA line) ................................................................... 64

Figure 47: 2-wire page write (SI/DATA line)........................................................................................ 64

Figure 48: 2-wire repeated write (SI/DATA line).................................................................................. 64

Figure 49: 36 bump WL-CSP 0.5mm pitch package outline drawing ............................................... 103

Tables

Table 1: Pin description ....................................................................................................................... 10

Table 2: Absolute maximum ratings .................................................................................................... 13

Table 3: Recommended operating conditions..................................................................................... 13

Table 4: Power dissipation table ......................................................................................................... 14

Table 5: Power consumption figures 1: ............................................................................................... 15

Table 6: Power consumption figures 2: ............................................................................................... 15

Table 7: Electrical characteristics: Microphone bias ........................................................................... 16

Table 8: Electrical characteristics: Input mixing units.......................................................................... 16

Table 9: Electrical characteristics: Analogue to digital converter (ADC)............................................. 17

Table 10: Electrical characteristics: Digital to analogue converter (DAC)........................................... 18

Table 11: Electrical characteristics: Line out and receiver amplifier ................................................... 19

Table 12: Electrical characteristics: Dynamic charge pump................................................................ 20

Table 13: Electrical characteristics: Headphone amplifier .................................................................. 21

Table 14: Electrical characteristics: Phase locked loop (MCLK)......................................................... 22

Table 15: Electrical characteristics: Digital I/O .................................................................................... 22

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