Chip Errata

DSP56366 Digital Signal Processor

Mask:2J26D

DSP56366 Errata

366CE2J26D_0_0

NG 11/12/01 pg. 2 of 25

 1997 -2001, Motorola

ES42

Description (added 3/3/ 98):

When a Direct Memory Access (DMA) channel is in Line mode (i.e., the DMA

Transfer Mode is DTM = 010) with address modes defined by DMA Three

Dimensional mode D3D = 0 and DMA = 10010x (i.e., the DMA Counter (DCO) is

in mode A), and the DCO value is greater than $FFF, then the DMA does not

function properly. This address mode implies “no update” at the destination and “no

update” or “post increment by 1” mode at the source.

Workaround:

Use Block Transfer mode (i.e., DTM = 000). For the DCO and DMA Address Mode

(DAM) settings described in this erratum, the Line Transfer mode of DMA is

identical to its Block Transfer mode, so this combination is redundant. In fact, a

block containing only one line is still a block.

2J26D

ES47

Description (added 3/3/1997):

If the DMA channel and the core access the same 1/4 K internal X data, Y data, or

program memory page, and the DMA interrupt is enabled, a false interrupt may

occur in addition to the correct one.

Workaround: Ensure that the channel’s DTD status bit in the DSTR is set before

jumping to the Interrupt Service Routine (i.e., the interrupt is correct only when

DTD is set).

Example:

ORG P:I_DMA0

JSSET #M_DTD0,X:M_DSTR,ISR_; ISR_ is the Interrupt Service

; Routine label for DMA channel 0

2J26D

Errata

Number

Errata Description

Applies

to Mask

Freescale Semiconductor, Inc.

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