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DSP56307EVM Product Brief

MOTOROLA

DSP56307

FEATURES

Hardware

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24-bit DSP56307 Digital Signal Processor

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High -Performance DSP56300 core

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100 Million Instructions Per Second (MIPS) with a 100-MHz clock at 2.5-V core and

3.3 V I/O

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Object code compatible with the DSP56000 core

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Highly-parallel instruction set

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Data Arithmetic Logic Unit (ALU)

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Fully pipelined 24-x 24-bit parallel multiplier-accumulator

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56-bit parallel barrel shifter

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Conditional ALU instructions

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24-bit or 16-bit arithmetic support under software control

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Position Independent Code (PIC) support

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Addressing modes optimized for DSP applications (including immediate offsets)

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On-chip memory-expandable hardware stack

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Nested hardware DO loops

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Fast auto-return interrupts

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On-chip concurrent six-channel DMA controller

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On-chip Phase-Locked Loop (PLL)

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On-Chip Emulation (OnCE

™) module

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JTAG port

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Address tracing mode reflects internal program RAM accesses at the external port

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Enhanced Filter Coprocessor (EFCOP)

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On-chip filtering and echo-cancellation coprocessor runs in parallel to the DSP core

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com