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P9222-R bảng dữ liệu(PDF) 9 Page - Renesas Technology Corp |
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P9222-R bảng dữ liệu(HTML) 9 Page - Renesas Technology Corp |
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9 / 58 page ![]() P9222-R/RN Datasheet © 2019-2022 Renesas Electronics Corporation 9 May 5, 2022 Pin Number Name Type Description F2, G1, G2 AC1 Input AC power input 1. Connect AC1 to the CS capacitors and CS to the Rx coil. Connect the CD capacitor from AC1 to AC2 (see Figure 2 and the application schematic in Figure 36). Due to symmetry, the AC1 and AC2 connections are interchangeable. F3 PDETB Output Open-drain, active-LOW. This pin is an output for indicating ping events are being received by the Rx. Connect this pin to the application processor (AP) I/O voltage rail using an external pull-up resistor. F4, G4, G5 AC2 Input AC power input 2. Connect this pin to the Rx coil and the CD capacitor (see Figure 2) Due to symmetry, the AC1 and AC2 connections are interchangeable.) F5 BST2 Output Bootstrap capacitor for driving the high-side NFETs of the internal rectifier. Connect a 15nF capacitor from AC2 to BST2. G3 PDET_RC Input Ping-detect input pin for determining when PDETB will be de-asserted. This pin is used to notify the AP if the Rx device is removed from the power transfer interface. Connect an RC time-delay circuit designed to hold the voltage on this pin above VPDET_RC_IL between each Tx ping after power transfer is completed (EOC). |
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