LIS2DUXS12 datasheet(100/104 Pages) STMICROELECTRONICS

100 / 104 page

Table 109. FIFO_DATA_OUT_X_H and FIFO_DATA_OUT_X_L register description ............................ 58

Table 110. FIFO_DATA_OUT_Y_H and FIFO_DATA_OUT_Y_L registers .................................... 58

Table 111. FIFO_DATA_OUT_Y_H and FIFO_DATA_OUT_Y_L register description ............................ 58

Table 112. FIFO_DATA_OUT_Z_H and FIFO_DATA_OUT_Z_L registers .................................... 59

Table 113. FIFO_DATA_OUT_Z_H and FIFO_DATA_OUT_Z_L register description............................. 59

Table 114. FIFO_BATCH_DEC register ........................................................... 59

Table 115. FIFO_BATCH_DEC register description ................................................... 59

Table 116. Accelerometer batch data rate .......................................................... 59

Table 117. TAP_CFG0 register ................................................................. 60

Table 118. TAP_CFG0 register description ......................................................... 60

Table 119. TAP_CFG1 register ................................................................. 60

Table 120. TAP_CFG1 register description ......................................................... 60

Table 121. TAP_CFG2 register ................................................................. 61

Table 122. TAP_CFG2 register description ......................................................... 61

Table 123. TAP_CFG3 register ................................................................. 61

Table 124. TAP_CFG3 register description ......................................................... 61

Table 125. TAP_CFG4 register ................................................................. 61

Table 126. TAP_CFG4 register description ......................................................... 61

Table 127. TAP_CFG5 register ................................................................. 62

Table 128. TAP_CFG5 register description ......................................................... 62

Table 129. TAP_CFG6 register ................................................................. 62

Table 130. TAP_CFG6 register description ......................................................... 62

Table 131. TIMESTAMP output registers .......................................................... 63

Table 132. TIMESTAMP output register description ................................................... 63

Table 133. Register address map - embedded functions ................................................ 64

Table 134. PAGE_SEL register ................................................................. 66

Table 135. PAGE_SEL register description ......................................................... 66

Table 136. EMB_FUNC_EN_A register............................................................ 66

Table 137. EMB_FUNC_EN_A register description ................................................... 66

Table 138. EMB_FUNC_EN_B register............................................................ 67

Table 139. EMB_FUNC_EN_B register description ................................................... 67

Table 140. EMB_FUNC_EXEC_STATUS register .................................................... 67

Table 141. EMB_FUNC_EXEC_STATUS register description ............................................ 67

Table 142. PAGE_ADDRESS register ............................................................ 67

Table 143. PAGE_ADDRESS register description .................................................... 67

Table 144. PAGE_VALUE register ............................................................... 68

Table 145. PAGE_VALUE register description ....................................................... 68

Table 146. EMB_FUNC_INT1 register ............................................................ 68

Table 147. EMB_FUNC_INT1 register description .................................................... 68

Table 148. FSM_INT1 register.................................................................. 69

Table 149. FSM_INT1 register description ......................................................... 69

Table 150. MLC_INT1 register.................................................................. 70

Table 151. MLC_INT1 register description ......................................................... 70

Table 152. EMB_FUNC_INT2 register ............................................................ 70

Table 153. EMB_FUNC_INT2 register description .................................................... 70

Table 154. FSM_INT2 register.................................................................. 71

Table 155. FSM_INT2 register description ......................................................... 71

Table 156. MLC_INT2 register.................................................................. 72

Table 157. MLC_INT2 register description ......................................................... 72

Table 158. EMB_FUNC_STATUS register.......................................................... 72

Table 159. EMB_FUNC_STATUS register description.................................................. 72

Table 160. FSM_STATUS register ............................................................... 73

Table 161. FSM_STATUS register description ....................................................... 73

Table 162. MLC_STATUS register ............................................................... 73

Table 163. MLC_STATUS register description ....................................................... 73

LIS2DUXS12

List of tables

DS14035 - Rev 2

page 100/104

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