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STPM066S bảng dữ liệu(PDF) 31 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Power management for automotive vision and radar systems
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5.2
SPI registers mapping
When registers are not written, their default state is the one shown in the respective map.
5.2.1
SPI REG BUCK
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESERVED
RESERVED
R
R
R
R
R
R/W
R/W
R
R
R
R/W
R/W
R/W
R/W
R
R
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
Address
0x01
BUCK_XTH: OV/UV/PG threshold setting (see Power output UV/OV monitor, Power Good)
BUCK_SPREAD_EN: Spread spectrum enable
BUCK_OUTPUT_SR: Output stage slew rate (see tSR_PH)
BUCK_SSCLK_SEL: SoftStart time selection (see tSOFTSTART_BUCK)
5.2.2
SPI REG WD_REC_EN
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESERVED
RESERVED
R
R
R
R
R
R
R
R
R
R
R/W
R
R
R
R
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
Address
0x02
SPI_WD_REC_EN: In case SPI_WD_REC_EN=1, WD failure asserts RESET_B and makes FSM go to REC state.
STPM066S
SPI registers mapping
DS12976 - Rev 2
page 31/67



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