STM32H7B3AI datasheet(154/238 Pages) STMICROELECTRONICS

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Symbol

Parameter

Conditions

Min(1) Typ(1) Max(1) Unit

THD

Total harmonic distorsion(6)

DAC output buffer ON CL ≤ 50pF, RL ≥ 5kΩ, 1 kHz

−78,6

DAC output buffer OFF CL ≤ 50pF, no RL, 1 kHz

−78,6

SINAD

Signal-to-noise and distorsion ratio(6)

DAC output buffer ON CL ≤ 50pF, RL ≥ 5kΩ, 1 kHz

67.5

DAC output buffer OFF CL ≤ 50pF, no RL, 1 kHz

67.5

ENOB

Effective number of bits

DAC output buffer ON CL ≤ 50pF, RL ≥ 5kΩ, 1 kHz

10.9

DAC output buffer OFF CL ≤ 50pF, no RL, 1 kHz

10.9

1. Guaranteed by design, unless otherwise specified.

2. Difference between two consecutive codes minus 1 LSB.

3. Difference between the value measured at Code i and the value measured at Code i on a line drawn between Code 0 and last Code 4095.

4. Difference between the value measured at Code (0x001) and the ideal value.

5. Difference between the ideal slope of the transfer function and the measured slope computed from code 0x000 and 0xFFF when the buffer

is OFF, and from code giving 0.2 V and (VREF+ − 0.2 V) when the buffer is ON.

6. Signal is −0.5dBFS with Fsampling = 1 MHz.

Figure 59. 12-bit buffered /non-buffered DAC

R L

C L

Buffered/Non-buffered DAC

DAC_OUTx

Buffer(1)

12-bit

digital to

analog

converter

The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external

loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring

the BOFFx bit in the DAC_CR register.

6.3.23

Voltage reference buffer characteristics

Table 98. VREFBUF characteristics

Symbol

Parameter

Conditions

Min(1)

Typ(1)

Max(1)

Unit

VDDA

Analog supply voltage

Normal mode

VSCALE = 000

2.8

3.3

3.6

VSCALE = 001

2.4

3.6

VSCALE = 010

2.1

3.6

VSCALE = 011

1.8

3.6

Degraded mode(2)

VSCALE = 000

1.62

2.80

VSCALE = 001

1.62

2.40

VSCALE = 010

1.62

2.10

VSCALE = 011

1.62

1.80

STM32H7B3xI

Operating conditions

DS13139 - Rev 8

page 154/238

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