STM32H7B3AI datasheet(153/238 Pages) STMICROELECTRONICS

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Symbol

Parameter

Conditions

Min(1)

Typ(1)

Max(1)

Unit

IDDA(DAC)

DAC quiescent

consumption from VDDA

DAC output buffer ON

No load, middle code

(0x800)

360

µA

No load, worst code

(0xF1C)

490

DAC output buffer OFF

No load, middle/worst

code (0x800)

Sample and Hold mode, CSH=100 nF

360*TON/

(TON+TOFF)(5)

IDDV(DAC)

DAC consumption from VREF+

DAC output buffer ON

No load, middle code

(0x800)

170

No load, worst code

(0xF1C)

170

DAC output buffer OFF

No load, middle/worst

code (0x800)

160

Sample and Hold mode, Buffer ON, CSH=100 nF

(worst code)

170*TON/

(TON+TOFF)(5)

Sample and Hold mode, Buffer OFF,

CSH=100 nF (worst code)

160*TON/

(TON+TOFF)(5)

1. Guaranteed by design, unless otherwise specified.

2. In buffered mode, the output can overshoot above the final value for low input code (starting from the minimum value).

3. DACx_OUT pin is not connected externally (internal connection only).

4. Refer to Table 65. I/O static characteristics.

5. TON is the refresh phase duration, while TOFF is the hold phase duration. Refer to the product reference manual for more details.

Table 97. DAC accuracy

Symbol

Parameter

Conditions

Min(1) Typ(1) Max(1) Unit

DNL

Differential non linearity(2)

DAC output buffer ON

−2

LSB

DAC output buffer OFF

−2

INL

Integral non linearity(3)

DAC output buffer ON, CL ≤ 50 pF, RL ≥ 5 kΩ

−4

LSB

DAC output buffer OFF, CL ≤ 50 pF, no RL

−4

Offset

Offset error at code 0x800(3)

DAC output buffer ON, CL ≤ 50 pF, RL ≥ 5 kΩ

VREF+ = 3.6 V

±12

LSB

VREF+ = 1.8 V

±25

DAC output buffer OFF, CL ≤ 50 pF, no RL

±8

Offset1

Offset error at code 0x001(4)

DAC output buffer OFF, CL ≤ 50 pF, no RL

±5

LSB

OffsetCal

Offset error at code 0x800 after

factory calibration

DAC output buffer ON, CL ≤ 50 pF, RL ≥ 5 kΩ

VREF+ = 3.6 V

±5

LSB

VREF+ = 1.8 V

±7

Gain

Gain error(5)

DAC output buffer ON,CL ≤ 50 pF, RL ≥ 5 kΩ

±1

DAC output buffer OFF, CL ≤ 50 pF, no RL

±1

TUE

Total undajusted error

DAC output buffer ON,CL ≤ 50 pF, RL ≥ 5 kΩ

±30

LSB

DAC output buffer OFF, CL ≤ 50 pF, no RL

±12

TUECal

Total undajusted error after

calibration

DAC output buffer ON CL ≤ 50pF, RL ≥ 5kΩ

±23

LSB

SNR

Signal-to-noise ratio(6)

DAC output buffer ON CL ≤ 50pF, RL ≥ 5kΩ 1 kHz, BW 500KHz

67.8

DAC output buffer OFF CL ≤ 50pF, no RL 1kHz, BW 500KHz

67.8

STM32H7B3xI

Operating conditions

DS13139 - Rev 8

page 153/238

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