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STM32H7B3AI bảng dữ liệu(PDF) 84 Page - STMicroelectronics |
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STM32H7B3AI bảng dữ liệu(HTML) 84 Page - STMicroelectronics |
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84 / 238 page  Symbol Parameter Operating conditions Min Typ Max Unit VCORE Regulator OFF: external VCORE voltage must be supplied from external regulator on VCAP pins VOS0 (max frequency 280 MHz) V 1.27 1.30 1.33 TA Ambient temperature for the suffix 6 version Maximum power dissipation –40 - 85 °C Low-power dissipation(5) –40 - 105 TJ Junction temperature range VOS0 –40 - 105 °C VOS3, VOS2, VOS1 –40 - 130 1. When a reset occurs, the functionality is guaranteed down to VPDRmax or to the specified VDDmin when the PDR is OFF. The PDR can only be switched OFF though the PDR_ON pin that is not available in all packages (refer to Table 7. STM32H7B3xI pin/ball definition) 2. Only for power-up sequence when the SMPS step-down converter is configured to supply the LDO. 3. This formula has to be applied on power supplies related to the I/O structures described by the pin definition table. 4. At startup, the external VCORE voltage must remain higher or equal to 1.10 V before disabling the internal regulator (LDO). 5. In low-power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Section 7.11 Thermal characteristics). Table 23. Maximum allowed clock frequencies Symbol (1)(2) Parameter VOS0 VOS1 VOS2 VOS3 Unit fCPU CPU 280 225 160 88 MHz fACLK AXI 280 225 160 88 fHCLK AHB 280 225 160 88 fPCLK APB 140 112.5 80 44 fltdc_ker_ck LTDC 140 112.5 80 44 ffmc_ker_ck FMC 280 225 160 88 foctospi_ker_clk OCTOSPI1/2 280 225 160 88 fsdmmc_ker_ck SDMMC1/2 280 225 160 88 fDFSDM1_Aclk DFSDM1 140 112.5 80 44 fDFSDM1_Clk 140 112.5 80 44 fDFSDM2_Aclk DFSDM2 140 112.5 80 44 fDFSDM2_Clk 140 112.5 80 44 ffdcan_ker_ck FDCAN 140 112.5 80 44 fcec_ker_ck HDMI_CEC 66 66 66 44 fI2C_ker_ck I2C[1:4] 140 112.5 80 44 flptim_ker_ck LPTIM[1:3] 140 112.5 80 44 frcc_tim_ker_ck TIM[2:7],TIM[12:14] 280 225 160 88 frcc_tim_ker_ck PWM1,PWM8,TIM[15:17] 280 225 160 88 frng_clk RNG 140 112.5 80 44 fsai_a_ker_ck SAI1 150 150 80 80 fsai_b_ker_ck fsai_a_ker_ck SAI2 150 150 80 80 fsai_b_ker_ck STM32H7B3xI Operating conditions DS13139 - Rev 8 page 84/238 |
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