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HC705RC16GRS/D bảng dữ liệu(PDF) 68 Page - NXP Semiconductors |
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HC705RC16GRS/D bảng dữ liệu(HTML) 68 Page - NXP Semiconductors |
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68 / 120 page ![]() Carrier Modulator Transmitter (CMT) General Release Specification MC68HC705RC16 — Rev. 3.0 Carrier Modulator Transmitter (CMT) 9.4 Carrier Generator The carrier signal is generated by counting a predetermined number of input clocks (500 ns for a 2-MHz oscillator) for both the carrier high time and the carrier low time. The period is determined by the total number of clocks counted. The duty cycle is determined by the ratio of high time clocks to total clocks counted. The high and low time values are user programmable and are held in two registers. An alternate set of high/low count values is held in another set of registers to allow the generation of dual frequency FSK (frequency shift keying) protocols without CPU intervention. The MCGEN bit in the MCSR must be set and the BASE bit in the MCSR must be cleared to enable carrier generator clocks. The block diagram is shown in Figure 9-2. Figure 9-2. Carrier Generator Block Diagram CLK 6-BIT UP COUNTER =? =? CLR PRIMARY HIGH COUNT REGISTER SECONDARY HIGH COUNT REGISTER MODE PRIMARY/ SELECT CARRIER OUT SECONDARY BASE fOSC MODULATOR/ CARRIER GENERATOR ENABLE PRIMARY LOW COUNT REGISTER SECONDARY LOW COUNT REGISTER Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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