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1 / 44 page  MCP16501 2020 Microchip Technology Inc. DS20006388A-page 1 Features • Input Voltage: 2.7V to 5.5V • Three 1A Output Current Buck Channels with 100% Maximum Duty Cycle Capability • 2 MHz Buck Channels PWM Operation • One Auxiliary 300 mA Low-Dropout Linear Regulator (LDO) • ±1% Voltage Accuracy for DDR (Buck2 Output) and Core (Buck3 Output) • Pin-Selectable Output Voltages for Buck2: 1.2V, 1.35V, 1.8V and for Buck3: 1.0V, 1.15V, 1.25V • MPU-Specific Built-in Default Channel Sequencing and nRSTO Assertion Delay • Support of MPU Hibernate, Low-Power Modes • Low Noise, Forced PWM (FPWM) and Low IQ, Light Load, High-Efficiency Mode Available • Leakage-Free Interfacing to MPU in any Operating Condition through Optimized ESD Protection • 250 µA Low-Power Mode Typical Quiescent Cur- rent Bucks and LDO On, No Load • 6 µA Maximum Shutdown Current (VIN =4.5V, TJ = +105°C) • Separate LDO EN Input, Compatible to LV Logic • Cost and Size-Optimized BOM • Thermal Shutdown and Current Limit Protection • 24-Pin 4 mm × 4 mm VQFN Package • -40°C to +125°C Junction Temperature Range Applications • High-Performance MPUs Power Supply Solutions • µC/µP, FPGA and DSP Power Description The MCP16501 is a cost and size optimized integrated PMIC, compatible with Microchip’s EMPUs (Embedded Microprocessor Units) and associated DRAM Memo- ries. It is compatible with SAMA5DX, SAM9X6 and SAMA7G MPUs, which are supported by dedicated device variants. The MCP16501 integrates three DC-DC Buck regulators and one auxiliary LDO, and provides a comprehensive interface to the MPU. All Buck channels can support loads up to 1A and are 100% duty cycle-capable. The 300 mA LDO is provided such that sensitive analog loads can be supported. The DDR memory voltage (Buck2 output) and MPU core voltage (Buck3 output) are selectable by means of two 3-state input pins. This method allows greater pre- cision in the output voltage setting by eliminating inac- curacies due to external feedback resistors, while minimizing external component count. The voltage selection set allows easy migration across different generations of memory. The default power channel sequencing is built-in according to the requirements of the MPU. A dedicated pin (LPM) facilitates the transition to Low-Power modes and the implementation of Backup mode with DDR in self-refresh (Hibernate mode). The MCP16501 features a low no-load operational quiescent current and it draws less than 6 µA (VIN = 4.5V, TJ = +105°C) in full shutdown. Active discharge resistors are provided on each output. All Buck channels support safe start-up into pre-biased outputs. The MCP16501 is available in a 24-pin 4 mm x 4 mm VQFN package with an operating junction temperature range from -40°C to +125°C. Cost and Size Optimized PMIC for SAMA5DX/SAM9X6/ SAMA7G Series MPUs |
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