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SW52212 bảng dữ liệu(PDF) 53 Page - Silicon Laboratories |
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SW52212 bảng dữ liệu(HTML) 53 Page - Silicon Laboratories |
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53 / 71 page ![]() Pin # Name Type Description 18 DIFF_1b O, DIF 0.7 V, 100 MHz differential clock 19 VDD PWR Power supply 20 NC NC No connect 21 DIFF_2 O, DIF 0.7 V, 100 MHz differential clock 22 DIFF_2b O, DIF 0.7 V, 100 MHz differential clock 23 OE_2b I, PD Output enable for DIFF_2 pair. (This pin has an internal 100 kΩ pull-down.) 0 = En- able outputs; 1 = Disable outputs 24 VDD_IO PWR Output power supply 25 DIFF_3 O, DIF 0.7 V, 100 MHz differential clock 26 DIFF_3b O, DIF 0.7 V, 100 MHz differential clock 27 OE_3b I, PD Output enable for DIFF_3 pair. (This pin has an internal 100 kΩ pull-down.) 0 = En- able outputs; 1 = Disable outputs 28 NC NC No connect 29 VDD PWR Power supply 30 NC NC No connect 31 VDDA PWR Analog Power Supply 32 GNDA PWR Analog Ground GND PAD GND Ground pad. This pad provides an electrical and thermal connection to ground and must be connected for proper operation. Use as many vias as practical, and keep the via length to an internal ground plane as short as possible. Data Sheet Pin Descriptions silabs.com | Building a more connected world. Rev. 1.0 | 53 |
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