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SW52212 bảng dữ liệu(PDF) 48 Page - Silicon Laboratories |
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SW52212 bảng dữ liệu(HTML) 48 Page - Silicon Laboratories |
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48 / 71 page ![]() Pin # Name Type Description 45 OE_7b I, PD Output enable for DIFF_7 pair (This pin has an internal 100 kΩ pull-down). 0 = En- able outputs; 1 = Disable outputs. 46 DIFF_7 O, DIF 0.7 V, 100 MHz differential clock. 47 DIFF_7b O, DIF 0.7 V, 100 MHz differential clock. 48 GND GND Ground. 49 VDD_IO PWR Output power supply. 50 DIFF_8 O, DIF 0.7 V, 100 MHz differential clock. 51 DIFF_8b O, DIF 0.7 V, 100 MHz differential clock 52 OE_8b I, PD Output enable for DIFF_8 pair (This pin has an internal 100 kΩ pull-down). 0 = En- able outputs; 1 = Disable outputs. 53 OE_9b I, PD Output enable for DIFF_9 pair (This pin has an internal 100 kΩ pull-down). 0 = En- able outputs; 1 = Disable outputs. 54 DIFF_9 O, DIF 0.7 V, 100 MHz differential clock. 55 DIFF_9b O, DIF 0.7 V, 100 MHz differential clock. 56 VDD_IO PWR Output power supply. 57 VDD PWR Power supply. 58 GND GND Ground. 59 DIFF_10 O, DIF 0.7 V, 100 MHz differential clock. 60 DIFF_10b O, DIF 0.7 V, 100 MHz differential clock. 61 OE_10b I, PD Output enable for DIFF_10 pair. (This pin has an internal 100 kΩ pull-down.) 0 = Enable outputs; 1 = Disable outputs. 62 OE_11b I, PD Output enable for DIFF_11 pair. (This pin has an internal 100 kΩ pull-down.) 0 = Enable outputs; 1 = Disable outputs. 63 DIFF_11 O, DIF 0.7 V, 100 MHz differential clock. 64 DIFF_11b O, DIF 0.7 V, 100 MHz differential clock GND PAD GND Ground pad. This pad provides an electrical and thermal connection to ground and must be connected for proper operation. Use as many vias as practical, and keep the via length to an internal ground plane as short as possible. Data Sheet Pin Descriptions silabs.com | Building a more connected world. Rev. 1.0 | 48 |
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