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AM85C30 bảng dữ liệu(PDF) 68 Page - Advanced Micro Devices

tên linh kiện AM85C30
Giải thích chi tiết về linh kiện  Enhanced Serial Communications Controller
PDF  68 Pages
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nhà sản xuất  AMD [Advanced Micro Devices]
Trang chủ  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM85C30 bảng dữ liệu(HTML) 68 Page - Advanced Micro Devices

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A M E N D M E N T
AMD
15
Am85C30
Am85C30 HARDWARE RESET
IN SOFTWARE
In the absence of a hardware logic or a Power-On-Reset
mechanism, the following procedure should be used to
ensure that the ESCC is properly reset.
1. Power Up
2. Read RR0
(Dummy Read)
3. Read RR1
(Dummy Read)
4. Write a C0h to WR9
(Hardware Reset)
5. Read RR0
(Should expect binary
01XXX100 = typically
‘44h’)
6. Read RR1
(Should expect binary
0X000110 = typically
‘06h’)
7. Write ‘a value’ to Write Register 2
8. Read RR2
(Should get ‘a value’)
If RR2 = WR2, in steps 7 and 8, then the ESCC is prop-
erly reset.
Note: For hardware reset only steps 1 through 4 are
needed; steps 5 through 8 are mentioned simply for
confirmation. Also, this procedure is applicable to only
the first time hardware reset. Any subsequent chip
reset can be achieved by simply writing a ‘C0’
to WR9.
For further information refer to the Technical Manual
PID # 07513D.



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