SN65LVDS86AQ, SN75LVDS86A

FlatLink RECEIVER

SLLS318C − NOVEMBER 1998 − REVISED JULY 2006

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POST OFFICE BOX 655303

178.5 Mbytes/s Throughput

Data Transmission From Controller to

Display With Very Low EMI

Low-Voltage Differential Channels In and

21 Data and Clock Low-Voltage TTL

Channels Out

Package (TSSOP) With 20-Mil Terminal

Pitch

31 MHz to 68 MHz

Requirements of ANSI EIA/TIA-644

Standard

and SN75LVDS86

High Reliability Automotive Applications

Configuration Control / Print Support

Qualification to Automotive Standards

description

The SN65LVDS86AQ/SN75LVDS86A FlatLink receiver contains three serial-in 7-bit parallel-out shift registers

and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions

allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, ’83, ’84, or ’85, over

four balanced-pair conductors and expansion to 21 bits of single-ended low-voltage LVTTL synchronous data

at a lower transfer rate.

When receiving, the high-speed LVDS data is received and loaded into registers at seven times the LVDS input

clock (CLKIN) rate. The data is then unloaded to a 21-bit wide LVTTL parallel bus at the CLKIN rate. The

’LVDS86A presents valid data on the falling edge of the output clock (CLKOUT).

The ’LVDS86A requires only four line-termination resistors for the differential inputs and little or no control. The

data bus appears the same at the input to the transmitter and output of the receiver with the data transmission

transparent to the user(s). The only user intervention is the possible use of the shutdown/clear (SHTDN)

active-low input to inhibit the clock and shut off the LVDS receivers for lower power consumption. A low level

on this signal clears all internal registers to a low level.

Copyright

 2006, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

FlatLink is a trademark of Texas Instruments Incorporated.

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D17

D18

GND

D19

D20

NC

LVDSGND

A0M

A0P

A1M

A1P

LVDSGND

A2M

A2P

CLKINM

CLKINP

LVDSGND

PLLGND

PLLGND

SHTDN

CLKOUT

D0

D16

D15

D14

GND

D13

D12

D11

D10

GND

D9

D8

D7

D6

GND

D5

D4

D3

D2

D1

GND

DGG PACKAGE

(TOP VIEW)

NC − Not connected