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MCP9600TE/MX bảng dữ liệu(PDF) 41 Page - Microchip Technology

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DS20005426G-page 41
MCP960X/L0X/RL0X
5.3.4
DEVICE ID AND REVISION ID
REGISTER
The Device ID (Identification) and Revision ID register
is a 16-bit read-only register, which can be used to
identify this device among other devices on the I2C
bus. The upper 8 bits indicate the Device ID of 0x40 for
the
MCP9600/L00/RL00
and
0x41
for
the
MCP9601/L01/RL01 respectively, while the lower 8 bits
indicate the device revision. The device revision byte is
divided into nibbles, where the upper nibble indicates
the major revision and the lower nibble indicates minor
revisions. The initial release is indicated by a major
revision of ‘1’ and a minor revision of ‘0’ or 0x4010 for
the
MCP9600/L00/RL00
and
0x4110
for
the
MCP9601/L01/RL01. (Refer to “MCP9600 Silicon
Errata and Data Sheet Clarification”, DS80000741, for
changes and revision IDs).
REGISTER 5-12:
MCP9600/L00/RL00 DEVICE ID AND REVISION ID REGISTER
R-0
R-1
R-0
R-0
R-0
R-0
R-0
R-0
Device ID
bit 15
bit 8
R-0
R-0
R-0
R-1
R-0
R-0
R-0
R-0
Revision-Major
Revision-Minor
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
Device ID: Device ID bits (0x40)
bit 7-0
Revision: Major/Minor Revision ID bits (0x10) for the initial Release, or Revision 1.0 (Refer to the
Silicon Errata, DS80000741, for change date codes and revision IDs).
REGISTER 5-13:
MCP9601/L01/RL01 DEVICE ID AND REVISION ID REGISTER
R-0
R-1
R-0
R-0
R-0
R-0
R-0
R-1
Device ID
bit 15
bit 8
R-0
R-0
R-0
R-1
R-0
R-0
R-0
R-0
Revision-Major
Revision-Minor
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
Device ID: Device ID bits (0x41)
bit 7-0
Revision: Major/Minor Revision ID bits (0x10) for the initial Release, or Revision 1.0 (Refer to the
Silicon Errata, DS80000741, for change date codes and revision IDs).



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