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74ALVT16374 bảng dữ liệu(PDF) 8 Page - NXP Semiconductors |
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74ALVT16374 bảng dữ liệu(HTML) 8 Page - NXP Semiconductors |
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8 / 12 page ![]() Philips Semiconductors Product specification 74ALVT16374 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) 1999 Oct 18 8 AC SETUP REQUIREMENTS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.5V ±0.2V VCC = 3.3V ±0.3V UNIT MIN TYP MIN TYP tS(H) tS(L) Setup time nDx to nCP 2 1.0 1.5 0 0.4 1.0 1.5 0 0 ns th(H) th(L) Hold time nDx to nCP 2 0.5 0.5 0 0 0.5 0.5 0 0 ns tW(H) tw(L) nCP pulse width High or Low 1 1.5 1.5 1.5 1.5 ns AC WAVEFORMS VM = 1.5V for VCC w 3.0V; VM = VCC/2 for VCC v 2.7V VX = VOL + 0.3V for VCC w 3.0V; VX = VOL + 0.15V for VCC v 2.7V VY = VOH – 0.3V for VCC w 3.0V; VY = VOH – 0.15V for VCC v 2.7V VM VM VM VM VM tw(H) tPHL tPLH nCP nQx SW00168 0V VOH VOL 1/fMAX tW(L) 3.0V or VCC whichever is less Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency NOTE: The shaded areas indicate when the input is per- mitted to change for predictable output performance. VM nDx VM VM VM VM nCP ts(H) th(H) ts(L) th(L) SW00169 VM 0V 0V 3.0V or VCC whichever is less 3.0V or VCC whichever is less Waveform 2. Data Setup and Hold Times nOE VM tPZH tPHZ 0V nQx VM VM SW00170 0V VY VOH 3.0V or VCC whichever is less Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level nOE tPZL tPLZ 0V nQx VM VM VM SW00171 VOL VX 3.0V or VCC whichever is less 3.0V or VCC Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level |
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