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XRT83SL28IV bảng dữ liệu(PDF) 7 Page - Exar Corporation |
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XRT83SL28IV bảng dữ liệu(HTML) 7 Page - Exar Corporation |
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7 / 47 page ![]() xr XRT83SL28 REV. 1.0.0 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT 5 PIN DESCRIPTIONS HOST MODE INTERFACE SERIAL MICROPROCESSOR INTERFACE NAME PIN TYPE DESCRIPTION CS 89 I Chip Select Input Active low signal. This signal enables the serial microprocessor interface by pulling chip select "Low". The serial interface is disabled when the chip select signal returns "High". SCLK 90 I Serial Clock Input The serial clock input samples SDI on the rising edge and updates SDO on the falling edge. See the Serial Microprocessor section of this datasheet for more details. SDI 92 I Serial Data Input The serial data input pin is used to supply an address and data string to pro- gram the internal registers within the device. See the Serial Microprocessor section of this datasheet for more details. SDO 91 O Serial Data Output The serial data output pin is used to retrieve the internal contents of a selected register in readback mode. See the Microprocessor section of this datasheet for more details. Reset 28 I Hardware Reset Input Active low signal. When this pin is pulled "Low" for more than 10µS, all internal registers and state machines are set to their default state. NOTE: This pin must be pulled "High" to VDD for normal operation. INT 100 O Interrupt Output Active low signal. This signal is asserted "Low" when a change in alarm status occurs. Once the status registers have been read, the interrupt pin will return "High". GIE (Global Interrupt Enable) must be set "High" in the appropriate global register to enable interrupt generation. NOTE: This pin is an open-drain output that requires an external 10K Ω pull-up resistor. HW/Host 81 I Hardware / Host Mode Select Input This pin is used to select the mode of operation. By default, the LIU is config- ured for Host mode. To select Hardware mode, this pin must be pulled "High". NOTE: Internally pulled "Low" with a 50k Ω resistor. |
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