DA9155M datasheet(19/38 Pages) RENESAS

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DA9155M

2.5 A Companion Charger for Rapid Charging

Datasheet

Revision 3.2

25-Feb-2022

CFR0011-120-00 Rev 5

19 of 37

SLAVEadr

REGadr

DATA

S = START condition

A = Acknowledge (low)

P = STOP condition

W = Write (low)

Master to Slave

Slave to Master

7-bits

1-bit

8-bits

Figure 13: Byte Write Operation

When the host reads data from a register it first has to write-access DA9155M the target register

address and then read-access DA9155M with a repeated START or alternatively a second START

condition. After receiving the data, the host sends NACK and terminates the transmission with a

STOP condition. This is illustrated in Figure 14.

SLAVEadr W

REGadr

SLAVEadr

S = START condition

A = Acknowledge (low)

Sr = Repeated START condition

* = No Acknowledge

P = STOP condition

W = Write (low)

R = Read (high)

Master to Slave

7-bits

1-bit

8-bits

7-bits

DATA

1-bit

8-bits

SLAVEadr

7-bits

DATA

1-bit

8-bits

Slave to Master

SLAVEadr W

REGadr

7-bits

1-bit

8-bits

Figure 14: Examples of Byte Read Operations

Consecutive (page) read-out mode is initiated from the master by sending an ACK instead of NACK

after receiving a byte, see Figure 15. The 2-wire control block then increments the address pointer to

the next register address and sends the data to the master. This enables an unlimited read of data

bytes until the master sends a NACK directly after receiving the data, followed by a subsequent

STOP condition. If a non-existent 2-wire address is read out then the DA9155M will return code zero.

SLAVEadr W A

REGadr

SLAVEadr

S = START condition

A = Acknowledge (low)

Sr = Repeat START condition

* = No Acknowledge

P = STOP condition

W = Write (low)

R = Read (high)

Master to Slave

Slave to Master

7-bits

1 bit

8-bits

7-bits

DATA

1-bit

8-bits

SLAVEadr

REGadr

SLAVEadr

7-bits

1-bit

8-bits

7-bits

DATA

1-bit

8-bits

DATA

8-bits

Figure 15: 2-Wire Page Read

The slave address after the Repeated START condition must be the same as the previous slave

address.

Consecutive (page) write mode is supported if the master sends several data bytes following a slave

address, stores the received data, and sends an ACK until the master sends a STOP condition. The

page write mode is illustrated in Figure 16.

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