công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

MSP430 bảng dữ liệu(PDF) 10 Page - Texas Instruments

tên linh kiện MSP430
Giải thích chi tiết về linh kiện  AFEx8101 16-Bit and 14-Bit, Low-Power DACs With Voltage Reference and Diagnostic ADC for 4-mA to 20-mA Loop-Powered Applications
PDF  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  TI [Texas Instruments]
Trang chủ  http://www.ti.com
Logo TI - Texas Instruments

MSP430 bảng dữ liệu(HTML) 10 Page - Texas Instruments

Back Button MSP430 Datasheet HTML 6Page - Texas Instruments MSP430 Datasheet HTML 7Page - Texas Instruments MSP430 Datasheet HTML 8Page - Texas Instruments MSP430 Datasheet HTML 9Page - Texas Instruments MSP430 Datasheet HTML 10Page - Texas Instruments MSP430 Datasheet HTML 11Page - Texas Instruments MSP430 Datasheet HTML 12Page - Texas Instruments MSP430 Datasheet HTML 13Page - Texas Instruments MSP430 Datasheet HTML 14Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 88 page
background image
6.6 Timing Requirements
all input signals are specified with tR = tF = 1 ns/V and timed from a voltage level of (VIL + VIH) / 2, 2.7 V ≤ PVDD ≤ 5.5 V,
VIH = 1.62 V, VIL = 0.15 V, VREFIO = 1.25 V, and TA = –40°C to +125°C (unless otherwise noted)
PARAMETER
MIN
NOM
MAX
UNIT
SERIAL INTERFACE - WRITE AND READ OPERATION
fSCLK
Serial clock frequency
12.5
MHz
tSCLKHIGH
SCLK high time
36
ns
tSCLKLOW
SCLK low time
36
ns
tCSHIGH
CS high time
80
ns
tCSS
CS to SCLK falling edge setup time
30
ns
tCSH
SCLK falling edge to CS rising edge
30
ns
tCSRI
CS rising edge to SCLK falling edge ignore
30
ns
tCSFI
SCLK falling edge ignore to CS falling edge
5
ns
tSDIS
SDI setup time
5
ns
tSDIH
SDI hold time
5
ns
tSDOZD
CS falling edge to SDO tri-state condition to driven
40
ns
tSDODZ
CS rising edge to SDO driven to tri-state condition
40
ns
tSDODLY
SCLK to SDO output delay
40
ns
UART
tBAUD
Baud rate = 9600 ± 1%
104
µs
DIGITAL LOGIC
tDACWAIT
Sequential DAC update wait time
2.1
µs
tPOR
POR reset delay
100
µs
tRESET
RESET pulse duration
100
ns
tRESETWAIT
Wait time after RESET pulse
10
µs
AFE78101, AFE88101
SLASF21 – DECEMBER 2022
www.ti.com
10
Submit Document Feedback
Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: AFE78101 AFE88101



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com