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BLE18PS080SN1 bảng dữ liệu(PDF) 24 Page - Texas Instruments |
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BLE18PS080SN1 bảng dữ liệu(HTML) 24 Page - Texas Instruments |
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24 / 33 page ![]() equal to or lower than 5 kΩ. Lower values of FB resistors achieve better noise immunity, and lower light load efficiency, as explained in the Design Considerations for a Resistive Feedback Divider in a DC/DC Converter technical brief. OUT OUT FB V V R1 = R2 1 = R2 1 V 0.8V æ ö æ ö ´ - ´ - ç ÷ ç ÷ è ø è ø (6) A feedforward capacitor (CFF) is not required for proper operation, but can further improve output noise. However, care must be taken in choosing the CFF, because the power-good (PG) function can not be valid with a large CFF during start-up, and can cause spurious triggering of the PG pin during a large load transient. Refer to the Pros and Cons Using a Feedforward Capacitor with a Low Dropout Regulator application report for a discussion of the pros and cons of using a feedforward capacitor. 8.2.2.2.6 NR/SS Capacitor Selection As described in Section 7.3.8, the NR/SS cap affects both the total noise and the soft-start time. When no NR/SS cap is connected, there is a default 2.35-ms soft-start time. The recommended value for a 5-ms soft-start time and good noise performance is 220 nF, as there is an internal 220 nF capacitor already in the module. The maximum NR/SS cap is 3.3 μF for a start-up time of 35 ms. Values greater than 1 μF have minimal improvement in noise performance. Use Equation 7 and Equation 8 to calculate the soft-start time based on desired soft-start time or the chosen capacitor value. Note that the CNRSS in the equation below is the combination of the internal 220 nF cap and any external cap from the CNRSS pin to GND. tsss = CNRSS×0.8 INRSS (7) CNRSSF = INRSS × tss 0.8 (8) TPSM82913 SLVSGJ4A – OCTOBER 2022 – REVISED DECEMBER 2022 www.ti.com 24 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: TPSM82913 |
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