STM32W108CB datasheet(188/278 Pages) STMICROELECTRONICS

tên linh kiện	STM32W108CB

Giải thích chi tiết về linh kiện	High-performance, IEEE 802.15.4 wireless system-on-chip with up to 256 Kbytes of embedded Flash memory

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General-purpose timers

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

188/278

Doc ID 16252 Rev 14

Using one timer to start the other timer

In this example, the enable of Timer 2 is set with the update event of Timer 1. Refer to

Figure 45 for connections. Timer 2 starts counting from its current value (which can be non-

zero) on the divided internal clock as soon as Timer 1 generates the update event.

When Timer 2 receives the trigger signal its CEN bit is automatically set and the counter

counts until 0 is written to the CEN bit in the TIM2_CR1 register. Both counter clock

frequencies are divided by 3 by the prescaler compared to CK_INT (fCK_CNT =

fCK_INT/3).

●

Configure Timer 1 in master mode to send its update event as trigger output (MMS =

010 in the TIM1_CR2 register).

●

Configure the Timer 1 period (TIM1_ARR register).

●

Configure Timer 2 to get the input trigger from Timer 1 (TS = 000 in the TIM2_SMCR

●

Configure Timer 2 in trigger mode (SMS = 110 in the TIM2_SMCR register).

●

Start Timer 1: Write 1 in the CEN bit (TIM1_CR1 register).

Figure 48.

Triggering timer 2 with update of Timer 1

As in the previous example, both counters can be initialized before starting counting.

Figure 47 shows the behavior with the same configuration shown in Figure 48, but in trigger

mode instead of gated mode (SMS = 110 in the TIM2_SMCR register).

TIE

Clear TIE

CK_INT

TIMER1-UEV

TIM1-CNT

TIM2-CNT

TIM2_CR1 CEN=1

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