STM32W108CB datasheet(120/278 Pages) STMICROELECTRONICS

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Serial interfaces

STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

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Doc ID 16252 Rev 14

A UART character frame contains, in sequence:

●

The start bit

●

The least significant data bit

●

The remaining data bits

●

If parity is enabled, the parity bit

●

The stop bit, or bits, if 2 stop bits are selected.

Figure 12 shows the UART character frame format, with optional bits indicated. Depending

on the options chosen for the character frame, the length of a character frame ranges from 9

to 12 bit times.

Note that asynchronous serial data may have arbitrarily long idle periods between

characters. When idle, serial data (TXD or RXD) is held in the high state. Serial data

transitions to the low state in the start bit at the beginning of a character frame.

Figure 12.

UART character frame format

9.6.2

FIFOs

Characters transmitted and received by the UART are buffered in the transmit and receive

FIFOs that are both 4 entries deep (see Figure 13). When software writes a character to the

SC1_DR register, it is pushed onto the transmit FIFO. Similarly, when software reads from

the SC1_DR register, the character returned is pulled from the receive FIFO. If the transmit

and receive DMA channels are used, the DMA channels also write to and read from the

transmit and receive FIFOs.

Figure 13.

UART FIFOs

Idle time

Start

Bit

Data

Bit 0

Data

Bit 1

Data

Bit 2

Data

Bit 3

Data

Bit 4

Data

Bit 5

Data

Bit 6

Data

Bit 7

Parity

Bit

Stop

Bit

Stop

Bit

Start Bit

IdleTime

UART Character Frame Format

(optional sections are in italics )

TXD

RXD

Receive Shift Register

SC1_DATA (read)

Transmit Shift Register

SC1_DATA (write)

RXD

TXD

Parity/Frame Errors

SC1_UARTSTAT

CPU and DMA

Channel Access

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