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STM32G483CE bảng dữ liệu(PDF) 33 Page - STMicroelectronics |
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STM32G483CE bảng dữ liệu(HTML) 33 Page - STMicroelectronics |
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33 / 230 page ![]() DS12997 Rev 4 33/230 STM32G483xE Functional overview 47 3.21 Comparators (COMP) The STM32G483xE devices embed seven rail-to-rail comparators with programmable reference voltage (internal or external), hysteresis. The reference voltage can be one of the following: • External I/O • DAC output channels • Internal reference voltage or submultiple (1/4, 1/2, 3/4). All comparators can wake up from Stop mode, generate interrupts and breaks for the timers. 3.22 Operational amplifier (OPAMP) The STM32G483xE devices embed six operational amplifiers with external or internal follower routing and PGA capability. The operational amplifier features: • 13 MHz bandwidth • Rail-to-rail input/output • PGA with a non-inverting gain ranging of 2, 4, 8, 16, 32 or 64 or inverting gain ranging of -1, -3, -7, -15, -31 or -63 3.23 Random number generator (RNG) All devices embed an RNG that delivers 32-bit random numbers generated by an integrated analog circuit. 3.24 Advanced encryption standard hardware accelerator (AES) The STM32G483xE devices embed an AES hardware accelerator that can be used both to encipher and to decipher data using an AES algorithm. |
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