STA335BWSQS datasheet(55/70 Pages) STMICROELECTRONICS

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STA335BWSQS

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6.12.17

Coefficient write/read control register

Coefficients for user-defined EQ, Mixing, Scaling, and Bass Management are handled

internally in the STA335BWSQS via RAM. Access to this RAM is available to the user via an

I2C register interface. A collection of I2C registers are dedicated to this function. One

contains a coefficient base address, five sets of three store the values of the 24-bit

coefficients to be written or that were read, and one contains bits used to control the

write/read of the coefficient(s) to/from RAM.

Three different RAM banks are embedded in STA335BWSQS. The three banks are

managed in paging mode using EQCFG register bits. They can be used to store different

EQ settings. For speaker frequency compensation, a sampling frequency independent EQ

must be implemented. Computing 3 different coefficients set for 32 kHz, 44.1kHz, 48 kHz

and downloading them in the 3 RAM banks, it is possible to select the suitable RAM block

depending from the incoming frequency with a simple I2C write operation on register 0x31.

For example, in case of different input sources (different sampling rates), the 3 different set

of coefficients can be downloaded once at the start up, and during the normal play it is

possible to switch among the 3 RAM blocks allowing a faster operation, without any

additional download from the microcontroller.

To write the coefficients in a particular RAM bank, this bank must be selected first writing bit

0 and bit 1 in register 0x31. Then the below write procedure can be used.

Note that as soon as a RAM bank is selected, the EQ settings will be automatically switched

to the coefficients stored in the active RAM block.

Note:

The read and write operation on RAM coefficients works only if LRCKI (pin 29) is switching.

Reading a coefficient from RAM

Select the RAM block with register 0x31 bit1, bit0.

Write 6-bits of address to I2C register 0x16.

Write 1 to R1 bit in I2C address 0x26.

Read top 8-bits of coefficient in I2C address 0x17.

Read middle 8-bits of coefficient in I2C address 0x18.

Read bottom 8-bits of coefficient in I2C address 0x19.

Reading a set of coefficients from RAM

Select the RAM block with register 0x31 bit1, bit0.

Write 6-bits of address to I2C register 0x16.

Write 1 to RA bit in I2C address 0x26.

Read top 8-bits of coefficient in I2C address 0x17.

Read middle 8-bits of coefficient in I2C address 0x18.

Read bottom 8-bits of coefficient in I2C address 0x19.

Read top 8-bits of coefficient b2 in I2C address 0x1A.

Read middle 8-bits of coefficient b2 in I2C address 0x1B.

Reserved

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