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NRF9160-SIBA-R bảng dữ liệu(PDF) 55 Page - Nordic Semiconductor

tên linh kiện NRF9160-SIBA-R
Giải thích chi tiết về linh kiện  nRF9160 Product Specification
PDF  400 Pages
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nhà sản xuất  NORDIC [Nordic Semiconductor]
Trang chủ  https://www.nordicsemi.com/
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NRF9160-SIBA-R bảng dữ liệu(HTML) 55 Page - Nordic Semiconductor

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Power and clock management
As illustrated in Clock and oscillator setup on page 54, the system supports the following low
frequency clock sources:
• LFRC: 32.768 kHz RC oscillator
• LFXO: 32.768 kHz high accuracy oscillator
The LFCLK clock controller and all LFCLK clock sources are always switched off when in System OFF mode.
The LFCLK clock is started by first selecting the preferred clock source in the LFCLKSRC on page 77
register and then triggering the LFCLKSTART task. LFXO is highly recommended as the LFCLK clock source,
since the LFRC has a large frequency variation.
Note: The LTE modem requires using LFXO as the LFCLK source.
Switching between LFCLK clock sources can be done without stopping the LFCLK clock. A LFCLK clock
source which is running prior to triggering the LFCLKSTART task will continue to run until the selected clock
source has been available. After that the clock sources will be switched. Switching between clock sources
will never introduce a glitch but it will stretch a clock pulse by 0.5 to 1.0 clock cycle (i.e. will delay rising
edge by 0.5 to 1.0 clock cycle).
Note: If the watchdog timer (WDT) is running, the default LFCLK clock source (LFRC - see LFCLKSRC
on page 77) is started automatically (LFCLKSTART task doesn't have to be triggered).
A LFCLKSTARTED event will be generated when the selected LFCLK clock source has started.
Note: When selecting LFXO as clock source for the first time, LFRC quality is provided until LFXO is
stable.
A LFCLKSTOP task will stop global requesting of the LFCLK clock. However, if any system component
(e.g. WDT, modem) requires the LFCLK, the clock won't be stopped. The LFCLKSTOP task should only be
triggered after the STATE field in the LFCLKSTAT register indicates a LFCLK running-state.
5.1.4.2.1 32.768 kHz RC oscillator (LFRC)
The default source of the low frequency clock (LFCLK) is the 32.768 kHz RC oscillator (LFRC).
The LFRC frequency will be affected by variation in temperature.
5.1.4.3 Registers
5.1.4.4 Electrical specification
5.1.4.4.1 64 MHz internal oscillator (HFINT)
Symbol
Description
Min.
Typ.
Max.
Units
fNOM_HFINT
Nominal output frequency
64
MHz
fTOL_HFINT
Frequency tolerance
+-1
+-5
%
tSTART_HFINT
Startup time
3.2
µs
5.1.4.4.2 64 MHz high accuracy oscillator (HFXO)
Symbol
Description
Min.
Typ.
Max.
Units
fNOM_HFXO
Nominal output frequency
64
MHz
fTOL_HFXO
Frequency tolerance
+-1
ppm
tSTART_HFXO
Startup time
TBA
ms
4418_1315 v2.0
55



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