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TC3567CFSG bảng dữ liệu(PDF) 4 Page - Toshiba Semiconductor

tên linh kiện TC3567CFSG
Giải thích chi tiết về linh kiện  TC3567CFSG-002 Bluetooth® low energy IC
PDF  49 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TC3567CFSG bảng dữ liệu(HTML) 4 Page - Toshiba Semiconductor

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TC3567CFSG-002
2018-04-06
4
1.
General Description
1.1. Product Concept
TC3567CFSG (Later omitted TC3567C.) are compliant with 2.4-GHz wireless communication, Bluetooth® Ver4.2 low energy. RF
analog parts and baseband digital parts are built in them, and TC3567C provides Bluetooth® HCI (Host Control Interface) functions
and Bluetooth® low energy GATT profile functions defined by Bluetooth® core specifications. The built-in flash memory for storing
applications enables easy implementation of standalone applications that use low-power consumption Bluetooth® communication.
The TC3567C can be connected to an external host CPU by the UART and controlled with the HCI or the GATT/SM layer control
command.
1.2. Features
Compliant with Bluetooth® Ver4.2 low energy
Built-in Bluetooth® Baseband Circuit
Built-in Bluetooth® RF analog Circuit
Transmission electric power: 0 dBm
Receiver sensitivity: -93.5 dBm
RSSI accuracy: ±1 dB (-90 to -10 dBm@input)
Internal matching circuit
Built-inARM® Cortex®-M0 (13 MHz or 26 MHz operation frequency is able to select to run)
Built-in masking ROM
Boot program
HCI/ extension HCI command
GATT/SM layer controlAPI (TCU command; Toshiba Command Unit)
API for hardware control
Retention SRAM (128 KB with 51 KB available for the user area)
Built-in serial NOR flash memory
128 KB (each sector size: 4 KB)
Writing/Erasing endurance: 100,000 times
Support up to 4 patch program loader functions and auto patch function
General Purpose IO ( 17 ports)
General Purpose Serial Interfaces
SPI interface (1 ch assigned to a General Purpose IO)
I2C interface (1 ch assigned to a General Purpose IO)
Host CPU Interface
UART interface (9600 bps to 921.6 kbps, 1ch - shared with GPIOs)
SPI interface
Emulator debug control interface
SWD(Serial Wire Debug)2-wire (1 ch)
Wake-up Interface (2 ch assigned to a General Purpose IO)
Wake-up input function from sleep and deep sleep
PWM Interface (4 ch assigned to General Purpose IOs)
Reference Clock Input (26 MHz)
Built-in oscillator for crystal oscillator connection
Sleep Clock Input (32.768 kHz)
Built-in oscillator for crystal oscillator connection
Works as Standalone (In User-App mode, operating by standalone is possible)
Sleep and Deep Sleep Functions



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