ADF4377 datasheet(5/79 Pages) AD

5 / 79 page

Data Sheet

ADF4377

SPECIFICATIONS

analog.com

Rev. 0 | 5 of 79

Table 1.

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

POWER SUPPLIES

Device setup5 for all supply current

specifications, unless noted

V5_VCO Supply Range

VV5_VCO

4.75

5.25

V5_CAL Supply Range

VV5_CAL

4.75

5.25

V5_CP Supply Range

VV5_CP

4.75

5.25

V3.3V_1 Supply Range

V3.3V_1

3.15

3.3

3.45

3.3 V Power Supply Group 1 (V3_LS,

V3_LDO, V3_REF, V3_PFD, V3_NDIV, V3_IN)

V3.3V_2 Supply Range

V3.3V_2

3.15

3.3

3.45

3.3 V Power Supply Group 2 (V3_CLK1,

V3_CLK2, V3_VCO, V3_CLKDIV)

V5_VCO Supply Current

IV5_VCO

135

fOUT = 12.8 GHz

170

220

fOUT = 6.4 GHz, CLKOUT_DIV = 0

V5_CAL Supply Current

IV5_CAL

160

μA

During VCO calibration

V5_CP Supply Current

IV5_CP

CP current (ICP) = 11.1 mA, CP_I = 15

ICP = 0.79 mA, CP_I = 0

55.2

CP_I = 15, EN_BLEED = 1, BLEED_I[1:0] =

512

V3.3V_1 Supply Current

I3.3V_1

173

200

173

R_DEL = 127

176

REF_SEL = BST_REF = FILT_REF = 1

173

PD_RDET = 1

189

During VCO calibration, EN_DRCLK =

EN_DNCLK = EN_ADC_CLK = 1

V3.3V_2 Supply Current

I3.3V_2

195

CLKOUT1_OP = CLKOUT2_OP = 0,

CLKOUT_DIV = 3

169

CLKOUT1_OP = CLKOUT2_OP = 0

179

CLKOUT1_OP = CLKOUT2_OP = 1

188

CLKOUT1_OP = CLKOUT2_OP = 2

197

CLKOUT1_OP = CLKOUT2_OP = 3,

139

160

ENCLK2 = low

Typical Power Dissipation

PDIS

1.75 to 1.9

ENCLK2 = low, V3.3V_1 = V3.3V_2 = 3.3 V,

VV5_VCO = 5 V, VCO Core 2 and Core 3

1.95 to

2.15

ENCLK2 = low, V3.3V_1 = V3.3V_2 = 3.3 V,

VV5_VCO = 5 V, VCO Core 0 and Core 1

Typical Power Down Current

3.3 V Supplies

PD_ALL = 1, I3.3V_1 + I3.3V_2

5 V Supplies

350

750

μA

PD_ALL = 1, IV5_VCO + IV5_CAL + IV5_CP

Typical Disable Current

3.3 V Supplies

0.1

1.5

CE = low, I3.3V_1 + I3.3V_2

5 V Supplies

350

750

μA

CE = low, IV5_VCO + IV5_CAL + IV5_CP

CLOCK OUTPUT NOISE CHARACTERISTICS

12 GHz Output Frequency

Device setup6, fOUT = 12 GHz

Phase Noise Floor

−160

dBc/Hz

RMS Jitter

12 kHz to 20 MHz Integration

17.6

fsrms

100 Hz to 100 MHz Integration

fsrms

Equivalent ADC SNR Method7

fsrms

10 GHz Output Frequency

Device setup6, fOUT = 10 GHz

Phase Noise Floor

−159.5

dBc/Hz

RMS Jitter

ADF4377 bảng dữ liệu(PDF) 5 Page - Analog Devices

ADF4377 bảng dữ liệu(HTML) 5 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

bảng dữ liệu tải về

Link URL