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STW81101 bảng dữ liệu(PDF) 22 Page - STMicroelectronics |
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STW81101 bảng dữ liệu(HTML) 22 Page - STMicroelectronics |
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22 / 42 page ![]() I2C bus interface STW81101 22/42 Figure 17. Start and Stop condition 5.1.5 Byte format and acknowledge Every byte transferred on the SDA line must contain bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first. An acknowledge bit is used to indicate a successful data transfer. The bus transmitter, either master or slave, will release the SDA bus after sending 8 bits of data. During the 9th clock pulse the receiver pulls the SDA low to acknowledge the receipt of 8 bits data. Figure 18. Byte format and acknowledge 5.1.6 Device addressing To start the communication between the Master and the STW81101, the master must initiate with a start condition. Following this, the master sends onto the SDA line 8 bits (MSB first) corresponding to the device select address and read or write mode. The first 7 MSB's are the device address identifier, corresponding to the I2C-Bus definition. For the STW81101 the address is set as "1100A2A1A0", 3bits programmable. The 8th bit (LSB) is the read or write operation bit (RW; set to 1 in read mode and to 0 in write mode). After a START condition the STW81101 identifies on the bus the device address and, if matched, it will acknowledge the identification on SDA bus during the 9th clock pulse. 5.1.7 Single-byte write mode Following a START condition the master sends a device select code with the RW bit set to 0. The STW81101 gives an acknowledge and waits for the internal sub-address (1 byte). This byte provides access to any of the internal registers. After the reception of the sub-address internal byte the STW81101 again responds with an acknowledge. A single-byte write to sub-address 00H will change the "FUNCTIONAL_MODE" register, so a single-byte write with sub-address 04H will change the "CONTROL" register and so on. SDA SCL START STOP SDA SCL START STOP SDA SCL START // // ACKNOWLEDGMENT FROM RECEIVER 1 2 37 8 9 MSB SDA SCL START // // ACKNOWLEDGMENT FROM RECEIVER 1 2 37 8 9 MSB |
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