L99MOD54XP datasheet(8/35 Pages) STMICROELECTRONICS

8 / 35 page

Block diagram and pin description

L99MOD54XP

8/35

DS12616 Rev 4

CM/PWM2

Current monitor output/PWM2 input

Depending on the selected multiplexer bits of input data register this output

sources an image of the instant current through the corresponding high-side

driver with a ratio of 1/10.000. This pin is bidirectional. The microcontroller can

overdrive the current monitor signal to provide a second PWM input for the output

OUT5.

CSN

Chip select not input

This input is low active and requires CMOS logic levels. The serial data transfer

between L99MOD54XP and micro controller is enabled by pulling the input CSN

to low-level.

Serial data output

The diagnosis data is available via the SPI and this 3-state output. The output

remains in 3-state, if the chip is not selected by the input CSN (CSN = high)

VCC

Logic supply voltage

For this input a ceramic capacitor as close as possible to GND is recommended.

CLK

Serial clock input

This input controls the internal shift register of the SPI and requires CMOS logic

levels.

Charge pump output

This output is provided to drive the gate of an external n-channel power MOS

used for reverse polarity protection.

PWM1

PWM1 input

This input signal can be used to control the drivers OUT1-OUT4 and OUT6 by an

external PWM signal.

OUT4,

OUT5

High-side driver output 4 and 5

Each output is built by a high-side switch and is intended for resistive loads,

hence the internal reverse diode from GND to the output is missing. For ESD

reason a diode to GND is present but the energy which can be dissipated is

limited. Each high-side driver is a power DMOS transistor with an internal

parasitic reverse diode from each output to VS (bulk-drain-diode). Each output is

over-current and open-load protected.

15, 16, 17, 20,

21, 22, 23, 24,

29, 30, 34

Not connected pins.

Table 2. Pin definitions and functions (continued)

Symbol

Function

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