L99MOD53XP datasheet(14/35 Pages) STMICROELECTRONICS

14 / 35 page

Electrical specifications

L99MOD53XP

14/35

DS12617 Rev 5

2.5

SPI - electrical characteristics

VS = 8 to 16 V, VCC = 4.5 to 5.3 V, Tj = - 40 to 150°C, unless otherwise specified. The

voltages are referred to GND and currents are assumed positive, when the current flows

into the pin.

frec1

Recovery frequency for OC

recovery duty cycle bit=1

316

kHz

dVOUT123/dt

dVOUT67/dt

Slew rate of OUT123 and

OUT67

VS =13.5 V, Rload=(1)

0.1

0.4

0.9

V/µs

dVOUT45/dt

Slew rate of OUT4 and OUT5 VS =13.5 V, Rload=(1)

0.08

0.2

0.4

V/µs

dVOUT8/dt

Slew rate of OUT8

VS =13.5 V, Rload=(1)

0.08

0.2

0.4

V/µs

OUT1,2,3 32 Ω OUT4,5 4 Ω OUT6,7 16 Ω OUT6,7 high RDSon mode 63Ω OUT8 4 Ω

2. tCC ON is the switch On delay time td ON if complement in half bridge has to switch off.

Table 11. OUT1 - OUT8 (continued)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

Table 12. Delay time from standby to active mode

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

tset

Delay time

Switching from standby to active mode. Time

until output drivers are enabled after CSN going

160

300

µs

Table 13. Inputs: CSN, CLK, PWM1/2 and DI

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VinL

Input low level

VCC = 5 V

1.5

2.0

VinH

Input high level

VCC = 5 V

3.0

3.5

VinHyst

Input hysteresis

VCC = 5 V

0.5

ICSN in

Pull up current at input CSN

VCSN = 3.5 V VCC = 5 V

-40

-20

-5

µA

ICLK in

Pull down current at input CLK

VCLK = 1.5 V

µA

IDI in

Pull down current at input DI

VDI = 1.5 V

µA

IPWM1 in

Pull down current at input PWM1

VPWM = 1.5 V

µA

Cin(1)

Input capacitance at input CSN,

CLK, DI and PWM1/2

0 V < VCC < 5.3 V

1. Value of input capacity is not measured in production test. Parameter guaranteed by design.

Table 14. DI timing

Symbol

Parameter(1)

Test condition

Min.

Typ.

Max.

Unit

tCLK

Clock period

VCC = 5 V

1000

tCLKH

Clock high time

VCC = 5 V

400

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