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L99MOD50XP bảng dữ liệu(PDF) 27 Page - STMicroelectronics |
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L99MOD50XP bảng dữ liệu(HTML) 27 Page - STMicroelectronics |
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27 / 42 page ![]() DS12615 Rev 4 27/42 L99MOD50XP Functional description of the SPI 41 Ocx: Operation code Ax: Address Dx: Data Bit 4.2 Command byte Each communication frame starts with a command byte. It consists of an operating code which specifies the type of operation (<Read>, <Write>, <Read and Clear>, <Read Device Information>) and a 6 bit address. If less than 6 address bits are required, the remaining bits are unused but are reserved. 4.2.1 Operation code definition The <Write Mode> and <Read Mode> operations allow access to the RAM of the device. A <Read and Clear Mode> operation is used to read a status register and subsequently clear its content. The <Read Device Information> allows access to the ROM area which contains device related information such as <ID-Header>, <Product Code>, <Silicon Version and Category> and <SPI-frame-ID>. 4.3 Global status byte Table 19. SPI frame Command byte Data byte Bit 23 22 21 29 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Name OC 1 OC0 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 Table 20. Operation code definition OC1 OC0 Meaning 0 0 <Write Mode> 0 1 <Read Mode> 1 0 <Read and Clear Mode> 1 1 <Read Device Information> Table 21. Global status byte Bit 7 6 5 4 3 2 1 0 Name GL_ER CO_ER C_RESET TSD TW UOV_OC OL NR Reset 0 0 1 0 0 0 0 0 |
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