DS12866 Rev 1

19/33

HVLED007

Application information

33

stops again the IC, repeating the same sequence.

With this operating mode the duration of each burst and the idle time are automatically

adjusted according to the load conditions: as the load is progressively decreased, the

number of switching cycles in each burst becomes smaller and smaller and the duration

of the idle time becomes longer and longer. If the load increases, the number of switching

cycles in each burst becomes larger and the duration of the idle time becomes shorter,

until the operation becomes again continuous.

4.6

Multiplier input for input voltage sensing (pin MULT)

The multiplier input (MULT) is intended to sense the rectified input voltage through a resistor

divider to provide a sinusoidal template to the multiplier and the ICS circuit.

driving (pin COMP)"). The condition to fulfill is:

Equation 11

calculated at the peak of the maximum specified input voltage does not exceed 3 V (linearity

reduced). Normally, this should not happen: the parameters of the ICS circuit have been

designed so as to allow a reflected voltage as high as 250 V even in an ultra-wide range

4.7

Current sensing input (pin CS). Sense resistor (Rs) selection

The PWM comparator (see Figure 4) senses the voltage Vcs (t, θ) across the current sense

circuit, determines the exact time when the external power switch is to be switched off, i.e.

triggering block (see Section 4.8: Zero current detection and triggering block (pin ZCD);

starter), which asserts the gate driver output low. The use of PWM latch avoids spurious

switching of the external power switch that might result from the noise generated ("double-

pulse suppression").

 1+K

v_min



------------------------------------------------------------------------------------------------------------------------



=

1.231

+

-------------------------