HVLED007TR datasheet(11/33 Pages) STMICROELECTRONICS

11 / 33 page

DS12866 Rev 1

11/33

HVLED007

Application information

Note that in Equation 2 also TON is denoted as a function of the instantaneous line phase θ;

in fact, with the novel method it is no longer constant as in the traditional method.

The "Input Current Shaper" (ICS) that implements this basic idea is shown in Figure 5 along

with the overall control loop inside the IC.

Figure 5. Input current shaper (ICS) block and its interconnection with HVLED007

control

The ON/OFF mechanism of the external power switch is exactly the same as in the

traditional TM method: the power switch is turned on as the secondary current zeroes (with

a delay TR to achieve valley switching, see "Section 4.8: Zero current detection and

triggering block (pin ZCD); starter") and turned off when the voltage Vcs (t, θ) on the current

sensing input CS (proportional to the primary current Ip (t, θ)) reaches the reference value

Vcsref (θ). Note that the explicit dependence on time (t) denotes cycle-by-cycle quantities.

The difference between the traditional TM method and that implemented in the HVLED007

is in the way the reference Vcsref (θ) is generated. In the traditional TM method, Vcsref (θ) is

generated by taking the input voltage as the template and adjusting its amplitude with

feedback loop control voltage via the multiplier; in the HVLED007 the output of the multiplier

is processed by the ICS circuit highlighted in the dotted box before being provided to the

PWM comparator. The ICS circuit is composed of the current generator IMULT (θ), the

external capacitor Ct connected between pin CT and ground and a switched resistor Rt that

is connected in parallel to Ct during the ON-time TON (θ) of the power switch through the

switch SW. The current generator provides the charging current for Ct, given by:

Equation 3

where Kp = RmultL / (RmultH + RmultL) is the voltage gain of the resistor divider that senses

the rectified input voltage. The key waveforms are shown in Figure 6.

Assuming T(θ) << Rt Ct << 1/(2 fline), to a first approximation the voltage ripple across the

capacitor Ct can be neglected and the current IMULT (θ) can be considered constant in a

switching cycle. The average voltage VCt (θ) developed across Ct, which shapes the peak

primary current Ippk(θ), is found by charge balance in a switching cycle:

Vcs t

IMULT

kI Vc VMULT

Vcsref

VZf

Vcsmax

VMULT

RCOMP

VCt

RmultH

RmultL

Ip t

IMULT 

 = k

I K p V inpk sin

 V



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