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L9788 bảng dữ liệu(PDF) 228 Page - STMicroelectronics |
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L9788 bảng dữ liệu(HTML) 228 Page - STMicroelectronics |
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228 / 264 page ![]() Micro second channel (MSC) interface L9788 228/264 DS12308 Rev 4 [5] RESP_ERR 1: 1 byte of 32-bit response is incorrect: one of the response bytes in the current sequencer run is wrong, reading WDA status register after the 4th byte write implies that this flag will always be read as 0. reset to zero at each sequencer-run [4] RESP_Z0 1: Controller set response time to 0ms a correct response within the time window nevertheless increments the error counter by one 0: Response-time is greater than 0ms [3] CHRT 1: Controller has changed response time reset to zero after a read access and after the next sequencer run [2] W_RESP 1: if one of the RESP_BYTEx was incorrect during the previous sequencer run; 0: otherwise [1] NO_RESP 1: in case of no response at all timer is restarted automatically reset to zero after a read access [0] RESP_TOO_EARLY 1: in case the 4 response bytes arrive before time window starts during the previous sequencer run; Reset to zero at each sequencer run FRAME[3]: WATCHDOG PWR_RST_CNT [7] WDA_RST See reset matrix [5:3] PWR_CNT[2:0] Current value of PWR_CNT register [2:0] RST_CNT[2:0] Current value of RST_CNT register FRAME[4]: WATCHDOG RESPTIME [7:6] CONFIG-REG9_1 [5:0] RESPTIME[5:0] CONFIG-REG9_0 |
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